Thibaud Tonnellier

Publication Activity (10 Years)

Years Active: 2016-2022
Publications (10 Years): 37

Top Topics

Error Correction

Top Venues

Publications

Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND. IEEE Trans. Very Large Scale Integr. Syst. 30 (6) (2022)
Elie Ngomseu Mambou, Thibaud Tonnellier, Warren J. Gross
Improved DC-Free Run-Length Limited 4B6B Codes for Concatenated Schemes. IEEE Access 10 (2022)
Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross
High-Throughput VLSI architecture for Soft-Decision decoding with ORBGRAND. CoRR (2021)
Jiajie Li, Syed Mohsin Abbas, Thibaud Tonnellier, Warren J. Gross
Reduced Complexity RPA Decoder for Reed-Muller Codes. ISTC (2021)
Thibaud Tonnellier, Warren J. Gross
On Systematic Polarization-Adjusted Convolutional (PAC) Codes. IEEE Commun. Lett. 25 (7) (2021)
Nghia Doan, Seyyed Ali Hashemi, Furkan Ercan, Thibaud Tonnellier, Warren J. Gross
Neural Successive Cancellation Flip Decoding of Polar Codes. J. Signal Process. Syst. 93 (6) (2021)
Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND. CoRR (2021)
Thibaud Tonnellier, Marzieh Hashemipour, Nghia Doan, Warren J. Gross, Alexios Balatsoukas-Stimming
Towards Practical Near-Maximum-Likelihood Decoding of Error-Correcting Codes: An Overview. ICASSP (2021)
Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross
High-Throughput VLSI Architecture for Soft-Decision Decoding with ORBGRAND. ICASSP (2021)
Elie Ngomseu Mambou, Thibaud Tonnellier, Warren J. Gross
Improved Dimming Scheme based on Non-DC Free RLL Codes for VLC. ISTC (2021)
Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Warren J. Gross
High-Throughput VLSI Architecture for GRAND. CoRR (2020)
Furkan Ercan, Thibaud Tonnellier, Nghia Doan, Warren J. Gross
Practical Dynamic SC-Flip Polar Decoders: Algorithm and Implementation. CoRR (2020)
Furkan Ercan, Thibaud Tonnellier, Carlo Condo, Warren J. Gross
Operation Merging for Hardware Implementations of Fast Polar Decoders. CoRR (2020)
Furkan Ercan, Thibaud Tonnellier, Nghia Doan, Warren J. Gross
Practical Dynamic SC-Flip Polar Decoders: Algorithm and Implementation. IEEE Trans. Signal Process. 68 (2020)
Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Warren J. Gross
High-Throughput VLSI Architecture for GRAND. SiPS (2020)
Thibaud Tonnellier, Warren J. Gross
On Systematic Polarization-Adjusted Convolutional (PAC) Codes. CoRR (2020)
Furkan Ercan, Thibaud Tonnellier, Nghia Doan, Warren J. Gross
Simplified Dynamic SC-Flip Polar Decoding. ICASSP (2020)
Furkan Ercan, Thibaud Tonnellier, Warren J. Gross
Energy-Efficient Hardware Architectures for Fast Polar Decoders. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2020)
Elie Ngomseu Mambou, Thibaud Tonnellier, Seyyed Ali Hashemi, Warren J. Gross
Efficient Flicker-Free FEC Codes Using Knuth's Balancing Algorithm for VLC. GLOBECOM (2019)
Nghia Doan, Seyyed Ali Hashemi, Elie Ngomseu Mambou, Thibaud Tonnellier, Warren J. Gross
Neural Belief Propagation Decoding of CRC-Polar Concatenated Codes. ICC (2019)
Adam Cavatassi, Thibaud Tonnellier, Warren J. Gross
Fast Decoding of Multi-Kernel Polar Codes. WCNC (2019)
Thibaud Tonnellier, Adam Cavatassi, Warren J. Gross
Length-Compatible Polar Codes: A Survey : (Invited Paper). CISS (2019)
Adrien Cassagne, Olivier Hartmann, Mathieu Léonardon, Kun He, Camille Leroux, Romain Tajan, Olivier Aumage, Denis Barthou, Thibaud Tonnellier, Vincent Pignoly, Bertrand Le Gal, Christophe Jégo
AFF3CT: A Fast Forward Error Correction Toolbox! SoftwareX 10 (2019)
Seyyed Ali Hashemi, Nghia Doan, Thibaud Tonnellier, Warren J. Gross
Deep-Learning-Aided Successive-Cancellation Decoding of Polar Codes. CoRR (2019)
Elie Ngomseu Mambou, Thibaud Tonnellier, Seyyed Ali Hashemi, Warren J. Gross
Efficient Flicker-Free FEC Codes using Knuth's Balancing Algorithm for VLC. CoRR (2019)
Furkan Ercan, Thibaud Tonnellier, Carlo Condo, Warren J. Gross
Operation Merging for Hardware Implementations of Fast Polar Decoders. J. Signal Process. Syst. 91 (9) (2019)
Seyyed Ali Hashemi, Nghia Doan, Thibaud Tonnellier, Warren J. Gross
Deep-Learning-Aided Successive-Cancellation Decoding of Polar Codes. ACSSC (2019)
Adam Cavatassi, Thibaud Tonnellier, Warren J. Gross
Fast Decoding of Multi-Kernel Polar Codes. CoRR (2019)
Adam Cavatassi, Thibaud Tonnellier, Warren J. Gross
Asymmetric Construction of Low-Latency and Length-Flexible Polar Codes. CoRR (2019)
Nghia Doan, Seyyed Ali Hashemi, Furkan Ercan, Thibaud Tonnellier, Warren J. Gross
Neural Dynamic Successive Cancellation Flip Decoding of Polar Codes. CoRR (2019)
Adam Cavatassi, Thibaud Tonnellier, Warren J. Gross
Asymmetric Construction of Low-Latency and Length-Flexible Polar Codes. ICC (2019)
Nghia Doan, Seyyed Ali Hashemi, Furkan Ercan, Thibaud Tonnellier, Warren J. Gross
Neural Dynamic Successive Cancellation Flip Decoding of Polar Codes. SiPS (2019)
Nghia Doan, Seyyed Ali Hashemi, Elie Ngomseu Mambou, Thibaud Tonnellier, Warren J. Gross
Neural Belief Propagation Decoding of CRC-Polar Concatenated Codes. CoRR (2018)
Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Nicolas Van Wambeke
Lowering the error floor of double-binary turbo codes: The flip and check algorithm. ISTC (2016)
Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Benjamin Gadat, Christophe Jégo, Nicolas Van Wambeke
Lowering the Error Floor of Turbo Codes With CRC Verification. IEEE Wirel. Commun. Lett. 5 (4) (2016)
Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Nicolas Van Wambeke
Hardware architecture for lowering the error floor of LTE turbo codes. DASIP (2016)
Adrien Cassagne, Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Olivier Aumage, Denis Barthou
Beyond Gbps Turbo decoder on multi-core CPUs. ISTC (2016)