Bertrand Le Gal

ORCID

Publication Activity (10 Years)

Years Active: 2004-2024
Publications (10 Years): 55

Top Venues

Publications

Juliette Pottier, Thomas Nieddu, Bertrand Le Gal, Sébastien Pillement, Maria Méndez Real
RISC-V processor enhanced with a dynamic micro-decoder unit. CoRR (2024)
Camille Monière, Bertrand Le Gal, Emmanuel Boutillon
Real-time energy-efficient software and hardware implementations of a QCSP communication system. J. Syst. Archit. 141 (2023)
Matthieu Magnant, Mohamed Amine Ben Temim, Bertrand Le Gal, Guillaume Ferré, Florian Collard
Real-Time Low-Earth Orbit Detector Implementation for Chirp-Based Preamble Communication Systems. LATINCOM (2023)
Hugues Almorin, Bertrand Le Gal, Christophe Jégo, Vincent Kissel
Model Based Design of FMCW Radar Processing Systems on FPGA Platforms. DSD (2023)
Bertrand Le Gal, Christophe Jégo, Vincent Pignoly
High-performance hard-input LDPC decoding on multi-core devices for optical space links. J. Syst. Archit. 137 (2023)
Antoine Siebert, Guillaume Ferré, Bertrand Le Gal, Aurélien Fourny
The Smart Kalman Filter: A Deep Learning-Based Approach for Time-Varying Channel Estimation. PIMRC (2023)
Denis Shemonaev, Bertrand Le Gal, Christophe Jégo, Anthony Besseau
Implementation of an Assignment Algorithm for Object Tracking on a FPGA MPSoC. DSD (2023)
Clémence Gillet, Adrien F. Vincent, Bertrand Le Gal, Sylvain Saïghi
A High-Level Methodology to Evaluate and Optimize Digital Architectures Targeting Spike Encoding. IEEE Access 11 (2023)
Léa Volpin, Bertrand Le Gal, Guillaume Ferré
Efficient LoRa-like Transmitter Stacks for SDR Applications. ICECS 2022 (2022)
Clémence Gillet, Adrien F. Vincent, Bertrand Le Gal, Sylvain Saïghi
Flexible design methodology for spike encoding implementation on FPGA. BioCAS (2022)
Camille Monière, Bertrand Le Gal, Emmanuel Boutillon
Efficient Software and Hardware Implementations of a QCSP Communication System. DASIP (2022)
Hugues Almorin, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo, Vincent Kissel
High-throughput FFT architectures using HLS tools. ICECS 2022 (2022)
Bertrand Le Gal, Vincent Pignoly, Christophe Jégo
High-Performance Gallager-E Decoders for Hard Input LDPC Decoding on Multi-core Devices. DASIP (2022)
Logan Saint-Germain, Bertrand Le Gal, Fabien Baldacci, Jérémie Crenne, Christophe Jégo, Sebastien Loty
Methodology to Adapt Neural Network on Constrained Device at Topology level. SiPS (2022)
Maël Tourres, Cyrille Chavet, Bertrand Le Gal, Jérémie Crenne, Philippe Coussy
Extended RISC-V hardware architecture for future digital communication systems. 5GWF (2021)
Camille Monière, Kassem Saied, Bertrand Le Gal, Emmanuel Boutillon
Time sliding window for the detection of CCSK frames. SiPS (2021)
Bertrand Le Gal, Christophe Jégo
High-Throughput FFT-SPA Decoder Implementation for Non-Binary LDPC Codes on x86 Multicore Processors. J. Signal Process. Syst. 92 (1) (2020)
Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
Model-based Design of Hardware SC Polar Decoders for FPGAs. ACM Trans. Reconfigurable Technol. Syst. 13 (2) (2020)
Vincent Pignoly, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Lyonel Barthe
Fair comparison of hardware and software LDPC decoder implementations for SDR space links. ICECS (2020)
Vincent Pignoly, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Lyonel Barthe
High speed LDPC decoding for optical space link. ICECS (2020)
Bertrand Le Gal, Christophe Jégo
Low-latency and high-throughput software turbo decoders on multi-core architectures. Ann. des Télécommunications 75 (1-2) (2020)
Bertrand Le Gal, Yann Delomier, Camille Leroux, Christophe Jégo
Low-Latency Sorter Architecture for Polar Codes Successive-Cancellation-List Decoding. SiPS (2020)
Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
Model-Based Design of Flexible and Efficient LDPC Decoders on FPGA Devices. J. Signal Process. Syst. 92 (7) (2020)
Adrien Cassagne, Olivier Hartmann, Mathieu Léonardon, Kun He, Camille Leroux, Romain Tajan, Olivier Aumage, Denis Barthou, Thibaud Tonnellier, Vincent Pignoly, Bertrand Le Gal, Christophe Jégo
AFF3CT: A Fast Forward Error Correction Toolbox! SoftwareX 10 (2019)
Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
Generation of Efficient Self-adaptive Hardware Polar Decoders Using High-Level Synthesis. SiPS (2019)
Vincent Pignoly, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat
High data rate and flexible hardware QC-LDPC decoder for satellite optical communications. ISTC (2018)
Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
Fast Design of Reliable, Flexible and High-Speed AWGN architectures with High Level Synthesis. ICECS (2018)
Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
ADMM hardware decoder for regular LDPC codes using a NISC-based architecture. WCNC (2018)
Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
From multicore LDPC decoder implementations to FPGA decoder architectures: a case study. ICECS (2018)
Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
Hardware design of Euclidean Projection modules for ADMM LDPC decoding. ICECS (2018)
Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
Implementation aspects of a pipeline ADMM-based LP decoding of LDPC convolutional codes. WCNC (2018)
Bertrand Le Gal, Camille Leroux, Christophe Jégo
High-performance software implementations of SCAN decoder for polar codes. Ann. des Télécommunications 73 (5-6) (2018)
Safouane Noubir, Yannick Bornat, Bertrand Le Gal
A scalable and efficient digital signal processing system for real time biological spike detection. ICECS (2018)
Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
Multicore and Manycore Implementations of ADMM-based Decoders for LDPC Decoding. J. Signal Process. Syst. 90 (11) (2018)
Yann Delomier, Bertrand Le Gal, Jérémie Crenne, Christophe Jégo
Model-based Design of Efficient LDPC Decoder Architectures. ISTC (2018)
Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
Low complexity ADMM-LP based decoding strategy for LDPC convolutional codes. SoftCOM (2017)
Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
Reduced complexity ADMM-based schedules for LP decoding of LDPC convolutional codes. SiPS (2017)
Hayfa Ben Thameur, Nadia Khouja, Fethi Tlili, Bertrand Le Gal, Christophe Jégo
An LP-based algorithm for decoding terminated LDPC convolutional codes. IINTEC (2017)
Bertrand Le Gal, Christophe Jégo
Low-latency software LDPC decoders for x86 multi-core devices. SiPS (2017)
Bertrand Le Gal, Camille Leroux, Christophe Jégo
Successive cancellation decoder for very long polar codes. SiPS (2017)
Hayfa Ben Thameur, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
A survey on decoding schedules of LDPC convolutional codes and associated hardware architectures. ISCC (2017)
Bertrand Le Gal, Camille Leroux, Christophe Jégo
Memory reduction techniques for successive cancellation decoding of polar codes. ICASSP (2016)
Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Nicolas Van Wambeke
Lowering the error floor of double-binary turbo codes: The flip and check algorithm. ISTC (2016)
Bertrand Le Gal, Yérom-David Bromberg, Laurent Réveillère, Jigar Solanki
A Flexible SoC and Its Methodology for Parser-Based Applications. ACM Trans. Reconfigurable Technol. Syst. 10 (1) (2016)
Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Benjamin Gadat, Christophe Jégo, Nicolas Van Wambeke
Lowering the Error Floor of Turbo Codes With CRC Verification. IEEE Wirel. Commun. Lett. 5 (4) (2016)
Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Nicolas Van Wambeke
Hardware architecture for lowering the error floor of LTE turbo codes. DASIP (2016)
Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
Real Time LP Decoding of LDPC Codes for High Correction Performance Applications. IEEE Wirel. Commun. Lett. 5 (6) (2016)
Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
Comparison of different schedulings for the ADMM based LDPC decoding. ISTC (2016)
Imen Debbabi, Nadia Khouja, Fethi Tlili, Bertrand Le Gal, Christophe Jégo
Multicore implementation of LDPC decoders based on ADMM algorithm. ICASSP (2016)
Bertrand Le Gal, Camille Leroux, Christophe Jégo
A scalable 3-phase polar decoder. ISCAS (2016)
Adrien Cassagne, Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Olivier Aumage, Denis Barthou
Beyond Gbps Turbo decoder on multi-core CPUs. ISTC (2016)
Bertrand Le Gal, Christophe Jégo
High-Throughput Multi-Core LDPC Decoders Based on x86 Processor. IEEE Trans. Parallel Distributed Syst. 27 (5) (2016)
Imen Debbabi, Nadia Khouja, Fethi Tlili, Bertrand Le Gal, Christophe Jégo
Evaluation of the hardware complexity of the ADMM approach for LDPC decoding. WCNC (2016)
Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
Fast Converging ADMM-Penalized Algorithm for LDPC Decoding. IEEE Commun. Lett. 20 (4) (2016)
Adrien Cassagne, Olivier Aumage, Camille Leroux, Denis Barthou, Bertrand Le Gal
Energy consumption analysis of software polar decoders on low power processors. EUSIPCO (2016)
Imen Debbabi, Bertrand Le Gal, Nadia Khouja, Fethi Tlili, Christophe Jégo
Analysis of ADMM-LP algorithm for LDPC decoding, a first step to hardware implementation. ICECS (2015)
Bertrand Le Gal, Christophe Jégo
High-Throughput LDPC Decoder on Low-Power Embedded Processors. IEEE Commun. Lett. 19 (11) (2015)
Adrien Cassagne, Bertrand Le Gal, Camille Leroux, Olivier Aumage, Denis Barthou
An Efficient, Portable and Generic Library for Successive Cancellation Decoding of Polar Codes. LCPC (2015)
Bertrand Le Gal, Camille Leroux, Christophe Jégo
Multi-Gb/s Software Decoding of Polar Codes. IEEE Trans. Signal Process. 63 (2) (2015)
Bertrand Le Gal, Camille Leroux, Christophe Jégo
Software polar decoder on an embedded processor. SiPS (2014)
Bertrand Le Gal, Christophe Jégo, Jérémie Crenne
A High Throughput Efficient Approach for Decoding LDPC Codes onto GPU Devices. IEEE Embed. Syst. Lett. 6 (2) (2014)
Bertrand Le Gal, Christophe Jégo
GPU-like on-chip system for decoding LDPC codes. ACM Trans. Embed. Comput. Syst. 13 (4) (2014)
Bertrand Le Gal, Christophe Jégo, Camille Leroux
A Flexible NISC-Based LDPC Decoder. IEEE Trans. Signal Process. 62 (10) (2014)
Moez Kthiri, Bertrand Le Gal, Patrice Kadionik, Ahmed Ben Atitallah
A Very High Throughput Deblocking Filter for H.264/AVC. J. Signal Process. Syst. 73 (2) (2013)
François Duhem, Fabrice Muller, Willy Aubry, Bertrand Le Gal, Daniel Négru, Philippe Lorenzini
Design space exploration for partially reconfigurable architectures in real-time systems. J. Syst. Archit. 59 (8) (2013)
Jigar Solanki, Laurent Réveillère, Yérom-David Bromberg, Bertrand Le Gal, Tegawendé F. Bissyandé
Improving the performance of message parsers for embedded systems. SAC (2013)
Bertrand Le Gal, Christophe Jégo
Softcore Processor Optimization According to Real-Application Requirements. IEEE Embed. Syst. Lett. 5 (1) (2013)
A. Aulery, Dominique Dallet, Bertrand Le Gal, Nathalie Deltimple, Didier Belot, Eric Kerherve
Study and analysis of a new implementation of a mixed-signal cartesian feedback for a low power zero-IF WCDMA transmitter. NEWCAS (2013)
Bertrand Le Gal, Christophe Jégo
Méthodologie d'optimisation des processeurs embarqués. Une approche favorisant la réduction de la surface et de la consommation des processeurs embarqués. Tech. Sci. Informatiques 32 (6) (2013)
Bertrand Le Gal, Christophe Jégo
Design of an ASIP LDPC Decoder Compliant with Digital Communication Standards. SiPS (2012)
Bertrand Le Gal, Christophe Jégo
FPGA prototyping of an ASIP LDPC decoder for the DVB-T2 standard. DASIP (2012)
Khaled Grati, Nadia Khouja, Bertrand Le Gal, Adel Ghazel
Power Consumption Models for Decimation FIR Filters in Multistandard Receivers. VLSI Design 2012 (2012)
Bogdan Belean, Monica Borda, Bertrand Le Gal, Romulus Terebes
FPGA based system for automatic cDNA microarray image processing. Comput. Medical Imaging Graph. 36 (5) (2012)
J. Mercadal, Laurent Réveillère, Yérom-David Bromberg, Bertrand Le Gal, Tegawendé F. Bissyandé, Jigar Solanki
Zebra: Building Efficient Network Message Parsers for Embedded Systems. IEEE Embed. Syst. Lett. 4 (3) (2012)
W. Sanaa, Bertrand Le Gal, Dominique Dallet, Chiheb Rebai, Nathalie Deltimple, Didier Belot, Eric Kerherve
New digital predistortion design based on mixed-signal cartesian feedback training for 3G homodyne transmitter. NEWCAS (2012)
Willy Aubry, Daniel Négru, Bertrand Le Gal, Dominique Dallet
Spatial downsizing impact in the transrating tradeoff for content/context awareness in media network. TEMU (2012)
Emmanuel Casseau, Bertrand Le Gal
Design of multi-mode application-specific cores based on high-level synthesis. Integr. 45 (1) (2012)
Willy Aubry, Bertrand Le Gal, Daniel Négru, Simon Desfarges, Dominique Dallet
A generic video adaptation FPGA implementation towards content- and context-awareness in future networks. DASIP (2012)
Bertrand Le Gal, Lilian Bossuet
Automatic low-cost IP watermarking technique based on output mark insertions. Des. Autom. Embed. Syst. 16 (2) (2012)
Willy Aubry, Daniel Négru, Bertrand Le Gal, Simon Desfarges, Dominique Dallet
A generic video adaptation framework towards content-and context-awareness in future networks. EUSIPCO (2012)
Bertrand Le Gal, Emmanuel Casseau
Word-Length Aware DSP Hardware Design Flow Based on High-Level Synthesis. J. Signal Process. Syst. 62 (3) (2011)
Michael Grand, Lilian Bossuet, Guy Gogniat, Bertrand Le Gal, Jean-Philippe Delahaye, Dominique Dallet
A Reconfigurable Multi-core Cryptoprocessor for Multi-channel Communication Systems. IPDPS Workshops (2011)
Aurélien Ribon, Bertrand Le Gal, Christophe Jégo, Dominique Dallet
Assertion support in high-level synthesis design flow. FDL (2011)
Bogdan Belean, Monica Borda, Bertrand Le Gal, Raul Malutan
FPGA technology and parallel computing towards automatic microarray image processing. TSP (2011)
Michael Grand, Lilian Bossuet, Bertrand Le Gal, Guy Gogniat, Dominique Dallet
Design and Implementation of a Multi-Core Crypto-Processor for Software Defined Radios. ARC (2011)
Willy Aubry, Bertrand Le Gal, Dominique Dallet, Simon Desfarges, Daniel Négru
A system aproach for reducing power consumption of multimedia devices with a low QoE impact. ICECS (2011)
Bertrand Le Gal, Emmanuel Casseau
Latency-Sensitive High-Level Synthesis for Multiple Word-Length DSP Design. EURASIP J. Adv. Signal Process. 2011 (2011)
Nicolas Mechouk, Dominique Dallet, Lilian Bossuet, Bertrand Le Gal
A low-area filter bank design methodology for on-chip ADC testing. ICECS (2010)
Bertrand Le Gal, Aurélien Ribon, Lilian Bossuet, Dominique Dallet
Area optimization of ROM-based controllers dedicated to digital signal processing applications. EUSIPCO (2010)
Bertrand Le Gal, Aurélien Ribon, Lilian Bossuet, Dominique Dallet
Reducing and smoothing power consumption of ROM-based controller implementations. SBCCI (2010)
Bertrand Le Gal, Emmanuel Casseau
Automated multimode system design for high performance DSP applications. EUSIPCO (2009)
Emmanuel Casseau, Bertrand Le Gal
High-level synthesis for the design of FPGA-based signal processing systems. ICSAMOS (2009)
Nadia Khouja, Khaled Grati, Adel Ghazel, Bertrand Le Gal
Design and implementation of a reconfigurable decimation and channel selection filter for GSM and UMTS radio standards. WCNC (2009)
Nadia Khouja, Bertrand Le Gal, Khaled Grati, Adel Ghazel
Experiments on designing low power decimation filter for multistandard receiver on heterogeneous targets. EUSIPCO (2009)
Guillaume Ferré, Maher Jridi, Lilian Bossuet, Bertrand Le Gal, Dominique Dallet
A new orthogonal online digital calibration for time-interleaved analog-to-digital converters. ISCAS (2008)
Bertrand Le Gal, Emmanuel Casseau, Sylvain Huet
Dynamic Memory Access Management for High-Performance DSP Applications Using High-Level Synthesis. IEEE Trans. Very Large Scale Integr. Syst. 16 (11) (2008)
Guillaume Ferré, Bertrand Le Gal, Lilian Bossuet, Maher Jridi, Dominique Dallet, P. Colucci
Orthogonal correction implementation for time interleaved analog-to-digital converters: Realtime application. EUSIPCO (2008)
Bertrand Le Gal, Emmanuel Casseau, Caaliph Andriamisaina
Synthèse de haut niveau tenant compte de la dynamique des traitements. Analyse de la largeur des données d'applications du TDSI et gestion de cette information lors de la synthèse de haut niveau. Tech. Sci. Informatiques 27 (9-10) (2008)
Bertrand Le Gal, Lilian Bossuet, Dominique Dallet
Mathematical functions based watermarking for IPP. ICECS (2007)
Bertrand Le Gal, Lilian Bossuet, Shafqat Khan, Emmanuel Casseau
HLS design flow for the synthesis of multimode systems under multiple constraints. ICECS (2007)

Bertrand Le Gal.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Bertrand Le Gal