From multicore LDPC decoder implementations to FPGA decoder architectures: a case study.
Yann DelomierBertrand Le GalJérémie CrenneChristophe JégoPublished in: ICECS (2018)
Keyphrases
- ldpc codes
- low density parity check
- distributed video coding
- fpga implementation
- turbo codes
- distributed source coding
- low complexity
- decoding algorithm
- error concealment
- hardware implementation
- error correction
- high speed
- rate allocation
- compressive sensing
- transform domain
- low cost
- video codec
- message passing
- rate distortion