Latency-Sensitive High-Level Synthesis for Multiple Word-Length DSP Design.

Bertrand Le Gal Emmanuel Casseau

Published in: EURASIP J. Adv. Signal Process. (2011)

Keyphrases

high level synthesis
parallel architecture
higher order
signal processing
real time
image processing
user interface
design process
information systems
case study
design space
digital signal processing
design space exploration