Yuan-Long Jeang

Publication Activity (10 Years)

Years Active: 1991-2010
Publications (10 Years): 0

Publications

Jer-Min Jou, Sih-Sian Wu, Yun-Lung Lee, Cheng Chou, Yuan-Long Jeang
New model-driven design and generation of multi-facet arbiters part I: from the design model to the architecture model. DAC (2010)
Yuan-Long Jeang, Ko-Yen Hu
A Pipelined Program Decompression Engine Generator Based on Partial Field-Partitioned (PFP) Compression Technique for Embedded Systems. IIH-MSP (2010)
Hung-Yu Wang, Yuan-Long Jeang, Ying-Chuan Liu, Yu-Wei Huang
CMOS current mirror with enhanced input dynamic range. Int. J. Circuit Theory Appl. 38 (7) (2010)
Yuan-Long Jeang, Chung-Wei Hung, Chuen-Muh Chiang
A Methodology Based on Maximal-Profit Spanning Tree for Designing Application Specific Networks on Chip (ASNOC). ICICIC (2) (2006)
Liang-Bi Chen, Ing-Jer Huang, Yuan-Long Jeang
Design of a Dynamic PCM Selector for Non-deterministic Environment. APCCAS (2006)
Yuan-Long Jeang, Ching-Ta Chen, Chih-Chung Tai
A New and Efficient Real-Time Address Tracer for Embedded Microprocessors. ICICIC (2) (2006)
Yuan-Long Jeang, Tzuu-Shaang Wey, Hung-Yu Wang, Chih-Chung Tai
A Single-Stream Pipelined Instruction Decompression System for Embedded Microprocessors. IIH-MSP (2006)
Yuan-Long Jeang, Tzuu-Shaang Wey, Hung-Yu Wang, Ching-Ta Chen
A Pre-processing Based Real-Time Address Tracer for Embedded Microprocessors. ICECS (2006)
Yuan-Long Jeang, Chih-Chung Tai, Yong-Zong Lin
A New and Efficient Field-Partition Based Code Compression and Its Pipelined Decompression System. ICICIC (2) (2006)
Yuan-Long Jeang, Ping-Shou Cheng, Jiun-Hau Tu, Kai-Jyun Liang, Ching-Ta Chen
A New EmbeddedWavelet Image Coding Based on Zero-block and Array (N-EZBA) and Its Efficient Hardware Implementation. ICICIC (2) (2006)
Yuan-Long Jeang, Jer-Min Jou, Win-Hsien Huang
A Binary Tree Based Methodology for Designing an Application Specific Network-on-Chip (ASNOC). IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2005)
Yuan-Long Jeang, Liang-Bi Chen, Yi-Ting Chou, Hsin-Chia Su
An embedded in-circuit emulator generator for SOC platform. FPT (2003)
Yuan-Long Jeang, Liang-Bi Chen, Chia-Pin Huang, Yu-Hsiang Hsu, Ming-Yu Yeh, Kai-Ming Yang
Design of FPGA-based adaptive remote calibration control system. FPT (2003)
Gwo-Yang Wu, Liang-Bi Chen, Yuan-Long Jeang, Gwo-Jia Jong
An optimal PCM codec soft IP generator and its application. FPT (2002)
Yuan-Long Jeang, Yu-Chin Hsu, Jhing-Fa Wang, Jau-Yien Lee
High throughput pipelined data path synthesis by conserving the regularity of nested loops. ICCAD (1993)
Ming-Hwa Sheu, Yuan-Long Jeang, Jhing-Fa Wang, Jau-Yien Lee
The determination of the cycle length in high level synthesis. Integr. 16 (2) (1993)
Yuan-Long Jeang, Jhing-Fa Wang, Jau-Yien Lee
On the Performance Guarantees of the Minimum Multisets Binding (MMB) Problem. J. Inf. Sci. Eng. 7 (2) (1991)