Ender Yilmaz

Publication Activity (10 Years)

Years Active: 2007-2021
Publications (10 Years): 9

Top Topics

Orthonormal Basis

Fault Detection

Analog Circuits

Top Venues

ACM Trans. Design Autom. Electr. Syst.

Publications

Mehmet Ince, Ender Yilmaz, Wei Fu, Joonsung Park, Krishnaswamy Nagaraj, LeRoy Winemberg, Sule Ozev
Fault-based Built-in Self-test and Evaluation of Phase Locked Loops. ACM Trans. Design Autom. Electr. Syst. 26 (3) (2021)
Yanjun Li, Ender Yilmaz, Pete Sarson, Sule Ozev
Adaptive Test for RF/Analog Circuit Using Higher Order Correlations among Measurements. ACM Trans. Design Autom. Electr. Syst. 24 (4) (2019)
Mehmet Ince, Ender Yilmaz, Wei Fu, Joonsung Park, Krishnaswamy Nagaraj, LeRoy Winemberg, Sule Ozev
Digital Built-in Self-Test for Phased Locked Loops to Enable Fault Detection. ETS (2019)
Srikanth Jagannathan, Kumar Abhishek, Nihaar N. Mahatme, Ender Yilmaz
Design of aging aware 5 Gbps LVDS transmitter for automotive applications. IRPS (2018)
Yanjun Li, Ender Yilmaz, Peter Sarson, Sule Ozev
Online information utility assessment for per-device adaptive test flow. VTS (2018)
Mehmet Ince, Ender Yilmaz, Sule Ozev
Enabling fast process variation and fault simulation through macromodelling of analog components. NATW (2018)
Mehmet Ince, Ender Yilmaz, Jae Woong Jeong, LeRoy Winemberg, Sule Ozev
Evaluation of loop transfer function based dynamic testing of LDOs. ITC-Asia (2017)
Jae Woong Jeong, Ender Yilmaz, LeRoy Winemberg, Sule Ozev
Built-in self-test for stability measurement of low dropout regulator. ITC (2017)
Ender Yilmaz, Sule Ozev
Adaptive-Learning-Based Importance Sampling for Analog Circuit DPPM Estimation. IEEE Des. Test 32 (1) (2015)
Ender Yilmaz, Afsaneh Nassery, Sule Ozev
Built-In EVM Measurement With Negligible Hardware Overhead. IEEE Des. Test 31 (1) (2014)
Ender Yilmaz, Sule Ozev, Kenneth M. Butler
Adaptive quality binning for analog circuits. ETS (2013)
Ender Yilmaz, Sule Ozev, Kenneth M. Butler
Efficient Process Shift Detection and Test Realignment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (12) (2013)
Ender Yilmaz, Sule Ozev, Kenneth M. Butler
Per-Device Adaptive Test for Analog/RF Circuits Using Entropy-Based Process Monitoring. IEEE Trans. Very Large Scale Integr. Syst. 21 (6) (2013)
Chandra K. H. Suresh, Ender Yilmaz, Sule Ozev, Ozgur Sinanoglu
Adaptive reduction of the frequency search space for multi-vdd digital circuits. DATE (2013)
Ender Yilmaz, Geoff Shofner, LeRoy Winemberg, Sule Ozev
Fault analysis and simulation of large scale industrial mixed-signal circuits. DATE (2013)
Lingfei Deng, Vinay Kundur, Naveen Sai Jangala Naga, Muhlis Kenan Ozel, Ender Yilmaz, Sule Ozev, Bertan Bakkaloglu, Sayfe Kiaei, Divya Pratab, Tehmoor Dar
Electrical calibration of spring-mass MEMS capacitive accelerometers. DATE (2013)
Ender Yilmaz, Sule Ozev, Ozgur Sinanoglu, Peter C. Maxwell
Adaptive testing: Conquering process variations. ETS (2012)
Ender Yilmaz, Sule Ozev
Test Application for Analog/RF Circuits With Low Computational Burden. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (6) (2012)
Ender Yilmaz, Sule Ozev
Adaptive multi-site testing for analog/mixed-signal circuits incorporating neighborhood information. ETS (2012)
Ender Yilmaz, Sule Ozev, Kenneth M. Butler
Adaptive multidimensional outlier analysis for analog and mixed signal circuits. ITC (2011)
Ender Yilmaz, Sule Ozev
Fast and Accurate DPPM Computation Using Model Based Filtering. ETS (2011)
Ender Yilmaz, Anne Meixner, Sule Ozev
An industrial case study of analog fault modeling. VTS (2011)
Ender Yilmaz, Sule Ozev, Kenneth M. Butler
Adaptive test flow for mixed-signal/RF circuits using learned information from device under test. ITC (2010)
Ender Yilmaz
Accurate multi-specification DPPM estimation using layered sampling based simulation. ISQED (2010)
Ender Yilmaz, Sule Ozev
Adaptive test elimination for analog/RF circuits. DAC (2009)
Ender Yilmaz, Afsaneh Nassery, Sule Ozev, Erkan Acar
Built-in EVM measurement for OFDM transceivers using all-digital DFT. ITC (2009)
Ender Yilmaz, Günhan Dündar
Analog Layout Generator for CMOS Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (1) (2009)
Ender Yilmaz, Sule Ozev
Defect-based test optimization for analog/RF circuits for near-zero DPPM applications. ICCD (2009)
Ender Yilmaz, Sule Ozev
Dynamic test scheduling for analog circuits for improved test quality. ICCD (2008)
Ender Yilmaz, Günhan Dündar
New layout generator for analog CMOS circuits. ECCTD (2007)