Emil Gizdarski

Publication Activity (10 Years)

Years Active: 1996-2017
Publications (10 Years): 1

Top Topics

Model Based Reasoning

Linear Constraints

Breast Cancer Diagnosis

Top Venues

Publications

Emil Gizdarski, Peter Wohl, John A. Waicukauski
A New Paradigm for Synthesis of Linear Decompressors. DAC (2017)
Xiaolei Cai, Emil Gizdarski, Dan Landau
A shared memory based parallel diagnosis system. VTS (2014)
Emil Gizdarski
Two-Step Dynamic Encoding for Linear Decompressors. ATS (2014)
Emil Gizdarski
Construction and Analysis of Augmented Time Compactors. J. Electron. Test. 27 (2) (2011)
Emil Gizdarski
Constructing augmented time compactors. ETS (2010)
Peter Wohl, John A. Waicukauski, Frederic Neuveux, Emil Gizdarski
Fully X-tolerant, very high scan compression. DAC (2010)
Emil Gizdarski
Constructing Augmented Multimode Compactors. VTS (2008)
Peter Wohl, John A. Waicukauski, Rohit Kapur, Sanjay Ramnath, Emil Gizdarski, Thomas W. Williams, P. Jaini
Minimizing the Impact of Scan Compression. VTS (2007)
Peter Wohl, John A. Waicukauski, Sanjay Patel, Cy Hay, Emil Gizdarski, Ben Mathew
Hierarchical Compactor Design for Diagnosis in Deterministic Logic BIST. VTS (2005)
Nodari Sitchinava, Samitha Samaranayake, Rohit Kapur, Emil Gizdarski, Frederic Neuveux, Thomas W. Williams
Changing the Scan Enable during Shift. VTS (2004)
Davide Appello, Alessandra Fudoli, Katia Giarda, Emil Gizdarski, Ben Mathew, Vincenzo Tancorre
Yield Analysis of Logic Circuits. VTS (2004)
Davide Appello, Alessandra Fudoli, Katia Giarda, Vincenzo Tancorre, Emil Gizdarski, Ben Mathew
Understanding Yield Losses in Logic Circuits. IEEE Des. Test Comput. 21 (3) (2004)
Samitha Samaranayake, Emil Gizdarski, Nodari Sitchinava, Frederic Neuveux, Rohit Kapur, Thomas W. Williams
A Reconfigurable Shared Scan-in Architecture. VTS (2003)
Emil Gizdarski, Hideo Fujiwara
Fault Set Partition for Efficient Width Compression. Asian Test Symposium (2002)
Michiko Inoue, Emil Gizdarski, Hideo Fujiwara
Sequential Circuits with Combinational Test Generation Complexity under Single-Fault Assumption. J. Electron. Test. 18 (1) (2002)
Emil Gizdarski, Hideo Fujiwara
SPIRIT: a highly robust combinational test generation algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (12) (2002)
Emil Gizdarski, Hideo Fujiwara
A Framework for Low Complexity Static Learning. DAC (2001)
Emil Gizdarski, Hideo Fujiwara
SPIRIT: A Highly Robust Combinational Test Generation Algorithm. VTS (2001)
Emil Gizdarski, Hideo Fujiwara
Spirit: satisfiability problem implementation for redundancy identification and test generation. Asian Test Symposium (2000)
Michiko Inoue, Emil Gizdarski, Hideo Fujiwara
A class of sequential circuits with combinational test generation complexity under single-fault assumption. Asian Test Symposium (2000)
Emil Gizdarski
Detection of Delay Faults in Memory Address Decoders. J. Electron. Test. 16 (4) (2000)
Emil Gizdarski
Built-in self-test for folded bit-line Mbit DRAMs. Integr. 21 (1-2) (1996)