Debabrata Ghosh

Publication Activity (10 Years)

Years Active: 1993-2024
Publications (10 Years): 7

Top Topics

Pricing Strategies

Diabetic Retinopathy

Image Mosaicing

Top Venues

J. Vis. Commun. Image Represent.

Ann. Oper. Res.

Int. J. Prod. Res.

Multim. Tools Appl.

Publications

Debabrata Ghosh, Kuntal Chowdhury, Samya Muhuri
Finding correlation between diabetic retinopathy and diabetes during pregnancy based on computer-aided diagnosis: a review. Multim. Tools Appl. 83 (9) (2024)
Puviyarasi Thirugnanasammandamoorthi, Debabrata Ghosh, Ram Kishan Dewangan
Uncovering the Extent of Flood Damage using Sentinel-1 SAR Imagery: A Case Study of the July 2020 Flood in Assam. CVIP (2) (2023)
Debabrata Ghosh, Janat Shah, Sanjeev Swami
Product greening and pricing strategies of firms under green sensitive consumer demand and environmental regulations. Ann. Oper. Res. 290 (1) (2020)
Mithu Rani Kuiti, Debabrata Ghosh, Sirish Kumar Gouda, Sanjeev Swami, Ravi Shankar
Integrated product design, shelf-space allocation and transportation decisions in green supply chains. Int. J. Prod. Res. 57 (19) (2019)
Vaishnavi Tunuguntla, Preetam Basu, Krishanu Rakshit, Debabrata Ghosh
Sponsored search advertising and dynamic pricing for perishable products under inventory-linked customer willingness to pay. Eur. J. Oper. Res. 276 (1) (2019)
Debabrata Ghosh, Naima Kaabouch, Wen-Chen Hu
A robust iterative super-resolution mosaicking algorithm using an adaptive and directional Huber-Markov regularization. J. Vis. Commun. Image Represent. 40 (2016)
Debabrata Ghosh, Naima Kaabouch
A survey on image mosaicing techniques. J. Vis. Commun. Image Represent. 34 (2016)
Debabrata Ghosh, Naima Kaabouch, Ronald A. Fevig
Robust Spatial-Domain Based Super-Resolution Mosaicing of CubeSat Video Frames: Algorithm and Evaluation. Comput. Inf. Sci. 7 (2) (2014)
Debabrata Ghosh, Ramasamy Subramanian, Vinay Murthy
A randomized methodology for post-silicon validation of CAN and other communication modules. ICACCI (2013)
Sangho Park, Debabrata Ghosh, Naima Kaabouch, Ronald A. Fevig, William Semke
Hierarchical multi-level image mosaicing for autonomous navigation of UAV. Intelligent Robots and Computer Vision: Algorithms and Techniques (2012)
Debabrata Ghosh, Sangho Park, Naima Kaabouch, William Semke
Quantitative evaluation of image mosaicing in multiple scene categories. EIT (2012)
Ashish M. Gujarathi, Saumitra Purohit, Rohan Manchanda, Debabrata Ghosh
Differential Evolution using Jumping Genes Adaptation. IICAI (2011)
Matthias F. M. Stallmann, Franc Brglez, Debabrata Ghosh
Heuristics, Experimental Subjects, and Treatment Evaluation in Bigraph Crossing Minimization. ACM J. Exp. Algorithmics 6 (2001)
Matthias F. M. Stallmann, Franc Brglez, Debabrata Ghosh
Heuristics and Experimental Design for Bigraph Crossing Number Minimization. ALENEX (1999)
Debabrata Ghosh, Franc Brglez
Equivalence classes of circuit mutants for experimental design. ISCAS (6) (1999)
Matthias F. M. Stallmann, Franc Brglez, Debabrata Ghosh
Evaluating iterative improvement heuristics for bigraph crossing minimization. ISCAS (6) (1999)
Debabrata Ghosh, Nevin Kapur, Franc Brglez, Justin E. Harlow III
Synthesis of Wiring Signature-Invariant Equivalence Class Circuit Mutants and Applications to Benchmarking. DATE (1998)
Nevin Kapur, Debabrata Ghosh, Franc Brglez
Towards a new benchmarking paradigm in EDA: analysis of equivalence class mutant circuit distributions. ISPD (1997)
Debabrata Ghosh, S. K. Nandy
Design and realization of high-performance wave-pipelined 8×8 b multiplier in CMOS technology. IEEE Trans. Very Large Scale Integr. Syst. 3 (1) (1995)
Debabrata Ghosh, Soumitra Kumar Nandy
Wave pipelined architecture folding: a method to achieve low power and low area. VLSI Design (1995)
Debabrata Ghosh, S. K. Nandy, K. Parthasarathy
TWTXBB: A Low Latency, High Throughput Multiplier Architecture Using a New 4 --> 2 Compressor. VLSI Design (1994)
Debabrata Ghosh, Shamik Sural, S. K. Nandy
A 600MHz Half-Bit Level Pipelined Multiplier Macrocell. VLSI Design (1994)
Debabrata Ghosh, S. K. Nandy, P. Sadayappan, K. Parthasarathy
Architectural Synthesis of Performance-Driven Multipliers with Accumulator Interleaving. DAC (1993)
Debabrata Ghosh, S. K. Nandy
A 400 MHz Wave-Pipelined 8 X 8-Bit Multiplier in CMOS Technology. ICCD (1993)
Debabrata Ghosh, S. K. Nandy, K. Parthasarathy, V. Visvanathan
NPCPL: Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs. VLSI Design (1993)