K. Parthasarathy

Publication Activity (10 Years)

Years Active: 1985-2014
Publications (10 Years): 0

Top Topics

Chaotic Time Series

Top Venues

Int. J. Wavelets Multiresolution Inf. Process.

Publications

T. C. Easwaran Nambudiri, K. Parthasarathy
Phase space frames and frame operators. Int. J. Wavelets Multiresolution Inf. Process. 12 (6) (2014)
Debabrata Ghosh, S. K. Nandy, K. Parthasarathy
TWTXBB: A Low Latency, High Throughput Multiplier Architecture Using a New 4 --> 2 Compressor. VLSI Design (1994)
G. N. Rathna, S. K. Nandy, K. Parthasarathy
A Methodology for Architecture Synthesis of Cascaded IIR Filters on TLU FPGAs. VLSI Design (1994)
Debabrata Ghosh, S. K. Nandy, P. Sadayappan, K. Parthasarathy
Architectural Synthesis of Performance-Driven Multipliers with Accumulator Interleaving. DAC (1993)
Debabrata Ghosh, S. K. Nandy, K. Parthasarathy, V. Visvanathan
NPCPL: Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs. VLSI Design (1993)
M. K. Sridhar, R. Srinath, K. Parthasarathy
On the direct parallel solution of systems of linear equations: New algorithms and systolic structures. Inf. Sci. 43 (1-2) (1987)
D. B. Fakruddin, K. Parthasarathy
Simplified algorithms based on Haar transforms for signal recognition in protective relays. Proc. IEEE 73 (5) (1985)