Soumitra Kumar Nandy

Publication Activity (10 Years)

Years Active: 1995-2022
Publications (10 Years): 4

Top Topics

Qr Decomposition

Top Venues

IEEE Commun. Surv. Tutorials

Publications

Oscar Ferraz, Srinivasan Subramaniyan, Ramesh Chinthalaa, João Andrade, Joseph R. Cavallaro, Soumitra Kumar Nandy, Vítor Silva, Xinmiao Zhang, Madhura Purnaprajna, Gabriel Falcão
A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA, and GPU Architectures. IEEE Commun. Surv. Tutorials 24 (1) (2022)
Gopinath Mahale, Soumitra Kumar Nandy, Eshan Bhatia, S. K. Nandy, Ranjani Narayan
VOP: Architecture of a Processor for Vector Operations in On-Line Learning of Neural Networks. VLSI Design (2016)
Ashish Kumar Pradhan, Soumitra Kumar Nandy
An Energy Efficient Dynamically Reconfigurable QR Decomposition for Wireless MIMO Communication. VLSI Design (2016)
Saptarsi Das, Nalesh Sivanandan, Kavitha T. Madhu, Soumitra Kumar Nandy, Ranjani Narayan
RHyMe: REDEFINE Hyper Cell Multicore for Accelerating HPC Kernels. VLSI Design (2016)
Mahnaz Mohammadi, Rohit Ronge, Jayesh Ramesh Chandiramani, Soumitra Kumar Nandy
An accelerator for classification using radial basis function neural network. SoCC (2015)
Ratna Krishnamoorthy, Saptarsi Das, Keshavan Varadarajan, Mythri Alle, Masahiro Fujita, Soumitra Kumar Nandy, Ranjani Narayan
Data Flow Graph Partitioning Algorithms and Their Evaluations for Optimal Spatio-temporal Computation on a Coarse Grain Reconfigurable Architecture. IPSJ Trans. Syst. LSI Des. Methodol. 4 (2011)
Saptarsi Das, Ranjani Narayan, Soumitra Kumar Nandy
Accelerating Reduction for Enabling Fast Multiplication over Large Binary Fields. ICETE (Selected Papers) (2011)
Jayanta Biswas, Soumitra Kumar Nandy
Efficient Key Management and Distribution for MANET. ICC (2006)
Arasu T. Senthil, C. P. Ravikumar, Soumitra Kumar Nandy
A low power and low cost scan test architecture for multi-clock domain SoCs using virtual divide and conquer. ITC (2005)
K. Kalapriya, K. Venkatesh Babu, Soumitra Kumar Nandy
Streaming stored playback video over a peer-to-peer network. ICC (2004)
Srinivasan Balakrishnan, Soumitra Kumar Nandy
Performance evaluation of multithreaded architectures for media processing applications. ISCAS (2000)
Srinivasan Balakrishnan, Soumitra Kumar Nandy
Arbitrary Precision Arithmetic - SIMD Style. VLSI Design (1998)
M. R. Karthikeyan, Soumitra Kumar Nandy
An asynchronous architecture for digital signal processors. ED&TC (1997)
Vinod Menezes, Soumitra Kumar Nandy, Biswadip Mitra
Spatial frequency based motion estimation for image sequence compression. HiPC (1996)
Debabrata Ghosh, Soumitra Kumar Nandy
Wave pipelined architecture folding: a method to achieve low power and low area. VLSI Design (1995)