Gopinath Mahale

Publication Activity (10 Years)

Years Active: 2014-2023
Publications (10 Years): 9

Top Topics

High Dimensional

Hardware Architecture

Connectionist Networks

Face Recognition

Top Venues

Publications

Gopinath Mahale, Tejas Limbasiya, Muhammad Asad Aleem, Luis A. Plana, Aleksandar Duricic, Alireza Monemi, Xabier Abancens, Teresa Cervero, John D. Davis
Optimizations for Very Long and Sparse Vector Operations on a RISC-V VPU: A Work-in-Progress. ISC Workshops (2023)
Gopinath Mahale, Pramod P. Udupa, Kiran Kolar Chandrasekharan, Sehwan Lee
WinDConv: A Fused Datapath CNN Accelerator for Power-Efficient Edge Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (11) (2020)
Pramod P. Udupa, Gopinath Mahale, Kiran Kolar Chandrasekharan, Sehwan Lee
IKW: Inter-Kernel Weights for Power Efficient Edge Computing. IEEE Access 8 (2020)
Pramod P. Udupa, Gopinath Mahale, Kiran Kolar Chandrasekharan, Sehwan Lee
Accelerating Depthwise Convolution and Pooling Operations on z-First Storage CNN Architectures. ISCAS (2020)
Tobias Kenter, Gopinath Mahale, Samer Alhaddad, Yevgen Grynko, Christian Schmitt, Ayesha Afzal, Frank Hannig, Jens Förstner, Christian Plessl
OpenCL-Based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes. FCCM (2018)
Gopinath Mahale, Hamsika Mahale, S. K. Nandy, Ranjani Narayan
REFRESH: REDEFINE for Face Recognition Using SURE Homogeneous Cores. IEEE Trans. Parallel Distributed Syst. 27 (12) (2016)
Gopinath Mahale, Soumitra Kumar Nandy, Eshan Bhatia, S. K. Nandy, Ranjani Narayan
VOP: Architecture of a Processor for Vector Operations in On-Line Learning of Neural Networks. VLSI Design (2016)
Julius, Gopinath Mahale, T. Sumana, C. S. Adityakrishna
On the modeling of error functions as high dimensional landscapes for weight initialization in learning networks. SAMOS (2016)
Julius, Gopinath Mahale, T. Sumana, C. S. Adityakrishna
On the Modeling of Error Functions as High Dimensional Landscapes for Weight Initialization in Learning Networks. CoRR (2016)
Gopinath Mahale, Hamsika Mahale, Arnav Goel, S. K. Nandy, S. Bhattacharya, Ranjani Narayan
Hardware Solution for Real-Time Face Recognition. VLSI Design (2015)
Gopinath Mahale, Hamsika Mahale, Rajesh Babu Parimi, S. K. Nandy, S. Bhattacharya
Hardware architecture of bi-cubic convolution interpolation for real-time image scaling. FPT (2014)