Chhandak Mukherjee

Publication Activity (10 Years)

Years Active: 2017-2024
Publications (10 Years): 13

Top Topics

Digital Circuits

Model Validation

Top Venues

Publications

Ian O'Connor, Sara Mannaa, Alberto Bosio, Bastien Deveautour, Damien Deleruyelle, Tetiana Obukhova, Cédric Marchand, Jens Trommer, Çigdem Çakirlar, Bruno Neckel Wesling, Thomas Mikolajick, Oskar Baumgartner, Mischa Thesberg, David Pirker, Christoph Lenz, Zlatan Stanojevic, Markus Karner, Guilhem Larrieu, Sylvain Pelloquin, Konstantinous Moustakas, Jonas Müller, Giovanni Ansaloni, Alireza Amirshahi, David Atienza, Jean-Luc Rouas, Leila Ben Letaifa, Georgeta Bordeall, Charles Brazier, Chhandak Mukherjee, Marina Deng, Yifan Wang, Marc François, Houssem Rezgui, Reveil Lucas, Cristell Maneux
FVLLMONTI: The 3D Neural Network Compute Cube $(N^{2}C^{2})$ Concept for Efficient Transformer Architectures Towards Speech-to-Speech Translation. DATE (2024)
Yifan Wang, Chhandak Mukherjee, Houssem Rezgui, Marina Deng, Cristell Maneux, Sara Mannaa, Ian O'Connor, Jonas Müller, Sylvain Pelloquin, Guilhem Larrieu
Electrothermal modeling of junctionless vertical Si nanowire transistors for 3D logic circuit design. ESSDERC (2023)
Nil Davy, Virginie Nodjiadjim, Muriel Riet, Colin Mismer, Marina Deng, Chhandak Mukherjee, Bertrand Ardouin, Cristell Maneux
InP DHBT Analytical Modeling: Toward THz Transistors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Arnaud Poittevin, Ian O'Connor, Cédric Marchand, Alberto Bosio, Cristell Maneux, Chhandak Mukherjee, Guilhem Larrieu, Abhishek Kumar
A Logic Cell Design and routing Methodology Specific to VNWFET. NEWCAS (2022)
Nil Davy, Marina Deng, Virginie Nodjiadjim, Chhandak Mukherjee, Muriel Riet, Colin Mismer, Jérémie Renaudier, Cristell Maneux
InP DHBT test structure optimization towards 110 GHz characterization. ESSDERC (2022)
Lucas Réveil, Chhandak Mukherjee, Cristell Maneux, Marina Deng, François Marc, Abhishek Kumar, Aurélie Lecestre, Guilhem Larrieu, Arnaud Poittevin, Ian O'Connor, Oskar Baumgartner, David Pirker
Analysis of an Inverter Logic Cell based on 3D Vertical NanoWire Junction-Less Transistors. VLSI-SoC (2022)
Sébastien Fregonese, Chhandak Mukherjee, Holger Rücker, Pascal Chevalier, Gerhard Fischer, Didier Céli, Marina Deng, Marine Couret, François Marc, Cristell Maneux, Thomas Zimmer
Electro-Thermal Limitations and Device Degradation of SiGe HBTs with Emphasis on Circuit Performance. BCICTS (2021)
Nil Davy, Virginie Nodjiadjim, Muriel Riet, Colin Mismer, Marina Deng, Chhandak Mukherjee, Jérémie Renaudier, Cristell Maneux
0.4-μm InP/InGaAs DHBT with a 380-GHz ${f_{T}}$, > 600-GHz $f_{\max}$ and BVCE0 > 4.5 V. BCICTS (2021)
Marina Deng, Chhandak Mukherjee, Nil Davy, Virginie Nodjiadjim, Muriel Riet, Colin Mismer, Jérémie Renaudier, Magali De Matos, Cristell Maneux
InP DHBT Characterization up to 500 GHz and Compact Model Validation Towards THz Circuit Design. BCICTS (2021)
Arnaud Poittevin, Chhandak Mukherjee, Ian O'Connor, Cristell Maneux, Guilhem Larrieu, Marina Deng, Sébastien Le Beux, François Marc, Aurélie Lecestre, Cédric Marchand, Abhishek Kumar
3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model. VLSI-SoC (Selected Papers) (2020)
Chhandak Mukherjee, Marina Deng, François Marc, Cristell Maneux, Arnaud Poittevin, Ian O'Connor, Sébastien Le Beux, Cédric Marchand, Abhishek Kumar, Aurélie Lecestre, Guilhem Larrieu
3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model. VLSI-SOC (2020)
Chhandak Mukherjee, Patrick Mounaix, Cristell Maneux, Michele Natrella, James Seddon, Chris Graham, Cyril C. Renaud
First Uni-Traveling Carrier Photodiode Compact Model Enabling Future Terahertz Communication System Design. ESSDERC (2019)
Chhandak Mukherjee, Cristell Maneux, Julien Pezard, Guilhem Larrieu
1/f Noise in 3D vertical gate-all-around junction-less silicon nanowire transistors. ESSDERC (2017)