3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model.
Chhandak MukherjeeMarina DengFrançois MarcCristell ManeuxArnaud PoittevinIan O'ConnorSébastien Le BeuxCédric MarchandAbhishek KumarAurélie LecestreGuilhem LarrieuPublished in: VLSI-SOC (2020)
Keyphrases
- case study
- metamodel
- formal model
- user interface
- mathematical model
- computational model
- conceptual framework
- simulation model
- statistical model
- prior knowledge
- objective function
- parameter estimation
- neural network
- cellular automata
- data processing
- probabilistic model
- cost effective
- bayesian networks
- high level
- layout design