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3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model.

Arnaud PoittevinChhandak MukherjeeIan O'ConnorCristell ManeuxGuilhem LarrieuMarina DengSébastien Le BeuxFrançois MarcAurélie LecestreCédric MarchandAbhishek Kumar
Published in: VLSI-SoC (Selected Papers) (2020)
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