Atsutake Kosuge

Publication Activity (10 Years)

Years Active: 2012-2024
Publications (10 Years): 37

Top Topics

Pose Estimation

Matrix Multiplication

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Dongzhu Li, Zhijie Zhan, Rei Sumikawa, Mototsugu Hamada, Atsutake Kosuge, Tadahiro Kuroda
A 0.13mJ/Prediction CIFAR-100 Fully Synthesizable Raster-Scan-Based Wired-Logic Processor in 16-nm FPGA. IEICE Trans. Electron. 107 (6) (2024)
Dongzhu Li, Tianqi Zhao, Kenji Kobayashi, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
Efficient FPGA Resource Utilization in Wired-Logic Processors Using Coarse and Fine Segmentation of LUTs for Non-Linear Functions. ISCAS (2024)
Kota Shiba, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
Crosstalk Analysis and Countermeasures of High-Bandwidth 3D-Stacked Memory Using Multi-Hop Inductive Coupling Interface. IEICE Trans. Electron. 106 (7) (2023)
Rei Sumikawa, Kota Shiba, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
A 1.2nJ/Classification Fully Synthesized All-Digital Asynchronous Wired-Logic Processor Using Quantized Non-Linear Function Blocks in 0.18μm CMOS. ASP-DAC (2023)
Eitaro Kobayashi, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
An Occlusion-Resilient mmWave Imaging Radar-Based Object Recognition System Using Synthetic Training Data Generation Technique. IECON (2023)
Atsutake Kosuge, Yao-Chung Hsu, Rei Sumikawa, Mototsugu Hamada, Tadahiro Kuroda, Tomoe Ishikawa
A 10.7-µJ/Frame 88% Accuracy CIFAR-10 Single-Chip Neuromorphic Field-Programmable Gate Array Processor Featuring Various Nonlinear Functions of Dendrites in the Human Cerebrum. IEEE Micro 43 (6) (2023)
Yao-Chung Hsu, Atsutake Kosuge, Rei Sumikawa, Kota Shiba, Mototsugu Hamada, Tadahiro Kuroda
A Fully Synthesized 13.7μJ/Prediction 88% Accuracy CIFAR-10 Single-Chip Data-Reusing Wired-Logic Processor Using Non-Linear Neural Network. ASP-DAC (2023)
Atsutake Kosuge, Rei Sumikawa, Yao-Chung Hsu, Kota Shiba, Mototsugu Hamada, Tadahiro Kuroda
A 183.4nJ/inference 152.8μW Single-Chip Fully Synthesizable Wired-Logic DNN Processor for Always-On 35 Voice Commands Recognition Application. VLSI Technology and Circuits (2023)
Dongzhu Li, Yao-Chung Hsu, Rei Sumikawa, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
A 0.13mJ/Prediction CIFAR-100 Raster-Scan- Based Wired-Logic Processor Using Non-Linear Neural Network. ISCAS (2023)
Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
Polyomino: A 3D-SRAM-Centric Accelerator for Randomly Pruned Matrix Multiplication With Simple Reordering Algorithm and Efficient Compression Format in 180-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (9) (2023)
Ximing Wang, Atsutake Kosuge, Yasuhiro Hayashi, Kota Shiba, Mototsugu Hamada, Tadahiro Kuroda
Analysis and Design of a 7 Gb/s Rotatable Non-contact Connector with Grid Array Package Application. NEWCAS (2023)
Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
3D-Stacked SRAM Module With 0.7-pJ/b Inductive Coupling Interface Using Over-SRAM Coil and Manchester-Encoded Synchronous Transceiver. IEEE J. Solid State Circuits 58 (7) (2023)
Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
A 6-Gb/s Inductively-Powered Non-Contact Connector With Rotatable Transmission Line Coupler and Interface Bridge IC. IEEE J. Solid State Circuits 57 (2) (2022)
Atsutake Kosuge, Tadahiro Kuroda
Proximity Wireless Communication Technologies: An Overview and Design Guidelines. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (11) (2022)
Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
A 6.5Gb/s Shared Bus Using Electromagnetic Connectors for Downsizing and Lightening Satellite Processor System. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (3) (2022)
Atsutake Kosuge, Satoshi Suehiro, Mototsugu Hamada, Tadahiro Kuroda
mmWave-YOLO: A mmWave Imaging Radar-Based Real-Time Multiclass Object Recognition System for ADAS Applications. IEEE Trans. Instrum. Meas. 71 (2022)
Reiji Miura, Saito Shibata, Masahiro Usui, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
A 5.2GHz RFID Chip Contactlessly Mountable on FPC at any 90-Degree Rotation and Face Orientation. ASP-DAC (2022)
Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
3D-Stacked SRAM with an Inductive Coupling Interface Using Over-SRAM Coils and Manchester-Encoded Synchronous Transceivers. HCS (2022)
Lixing Yu, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
An Anomaly Detection System for Transparent Objects Using Polarized-Image Fusion Technique. SAS (2022)
Ximing Wang, Atsutake Kosuge, Yasuhiro Hayashi, Mototsugu Hamada, Tadahiro Kuroda
A 7 Gb/s Micro Rotatable Transmission Line Coupler with Deep Proximity Coupling Mode and Ground Shielding Vias. ICECS 2022 (2022)
Yao-Chung Hsu, Atsutake Kosuge, Rei Sumikawa, Kota Shiba, Mototsugu Hamada, Tadahiro Kuroda
A 13.7μJ/prediction 88% Accuracy CIFAR-10 Single-Chip Wired-logic Processor in 16-nm FPGA using Non-Linear Neural Network. HCS (2022)
Saito Shibata, Yoshiki Sawabe, Kota Shiba, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
A Low-power RFID with 100kbps Data Rate Employing High-speed Power Clock Generator for Complementary Pass-transistor Adiabatic Logic. ICECS 2022 (2022)
Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
Polyomino: A 3D-SRAM-Centric Architecture for Randomly Pruned Matrix Multiplication with Simple Rearrangement Algorithm and x0.37 Compression Format. NEWCAS (2022)
Atsutake Kosuge, Yao-Chung Hsu, Mototsugu Hamada, Tadahiro Kuroda
A 0.61-μJ/Frame Pipelined Wired-logic DNN Processor in 16-nm FPGA Using Convolutional Non-Linear Neural Network. IEEE Open J. Circuits Syst. 3 (2022)
Viviana Crescitelli, Atsutake Kosuge, Takashi Oshima
POISON: Human Pose Estimation in Insufficient Lighting Conditions Using Sensor Fusion. IEEE Trans. Instrum. Meas. 70 (2021)
Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
A 16 nJ/Classification FPGA-Based Wired-Logic DNN Accelerator Using Fixed-Weight Non-Linear Neural Net. IEEE J. Emerg. Sel. Topics Circuits Syst. 11 (4) (2021)
Saito Shibata, Reiji Miura, Yoshiki Sawabe, Kota Shiba, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda
Collision Avoidable RFID Employing Complementary Pass-transistor Adiabatic Logic with an Inductively Connected External Antenna. A-SSCC (2021)
Atsutake Kosuge, Keisuke Yamamoto, Yukinori Akamine, Takashi Oshima
An SoC-FPGA-Based Iterative-Closest-Point Accelerator Enabling Faster Picking Robots. IEEE Trans. Ind. Electron. 68 (4) (2021)
Atsutake Kosuge, Takashi Oshima
A 1200×1200 8-Edges/Vertex FPGA-Based Motion-Planning Accelerator for Dual-Arm-Robot Manipulation Systems. VLSI Circuits (2020)
Atsutake Kosuge, Takashi Oshima
An Object-Pose Estimation Acceleration Technique for Picking Robot Applications by Using Graph-Reusing k-NN Search. GC (2019)
Atsutake Kosuge, Keisuke Yamamoto, Yukinori Akamine, Taizo Yamawaki, Takashi Oshima
A 4.8x Faster FPGA-Based Iterative Closest Point Accelerator for Object Pose Estimation of Picking Robot Applications. FCCM (2019)
Atsutake Kosuge, Junichiro Kadomoto, Tadahiro Kuroda
A 6 Gb/s 6 pJ/b 5 mm-Distance Non-Contact Interface for Modular Smartphones Using Two-Fold Transmission Line Coupler and High EMC Tolerant Pulse Transceiver. IEEE J. Solid State Circuits 51 (6) (2016)
So Hasegawa, Junichiro Kadomoto, Atsutake Kosuge, Tadahiro Kuroda
inductive-coupling side-by-side chip link. ESSCIRC (2016)
Li-Chung Hsu, Junichiro Kadomoto, So Hasegawa, Atsutake Kosuge, Yasuhiro Take, Tadahiro Kuroda
Analytical thruchip inductive coupling channel design optimization. ASP-DAC (2016)
Atsutake Kosuge, Junki Hashiba, Toru Kawajiri, So Hasegawa, Tsunaaki Shidei, Hiroki Ishikuro, Tadahiro Kuroda, Ken Takeuchi
An Inductively Powered Wireless Solid-State Drive System With Merged Error Correction of High-Speed Wireless Data Links and NAND Flash Memories. IEEE J. Solid State Circuits 51 (4) (2016)
Junichiro Kadomoto, So Hasegawa, Yusuke Kiuchi, Atsutake Kosuge, Tadahiro Kuroda
Analysis and Evaluation of Electromagnetic Interference between ThruChip Interface and LC-VCO. IEICE Trans. Electron. (6) (2016)
Atsutake Kosuge, Akira Okada, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
A 280 Mb/s In-Vehicle LAN System Using Electromagnetic Clip Connector and High-EMC Transceiver. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2016)
Li-Chung Hsu, Junichiro Kadomoto, So Hasegawa, Atsutake Kosuge, Yasuhiro Take, Tadahiro Kuroda
A Study of Physical Design Guidelines in ThruChip Inductive Coupling Channel. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2015)
Atsutake Kosuge, Junki Hashiba, Toru Kawajiri, So Hasegawa, Tsunaaki Shidei, Hiroki Ishikuro, Tadahiro Kuroda, Ken Takeuchi
Inductively-powered wireless solid-state drive (SSD) system with merged error correction of high-speed non-contact data links and NAND flash memory. VLSIC (2015)
Atsutake Kosuge, Shu Ishizuka, Junichiro Kadomoto, Tadahiro Kuroda
10.1 A 6Gb/s 6pJ/b 5mm-distance non-contact interface for modular smartphones using two-fold transmission-line coupler and EMC-qualified pulse transceiver. ISSCC (2015)
Atsutake Kosuge, Shu Ishizuka, Marni Abe, Satoshi Ichikawa, Tadahiro Kuroda
24.4 A 6.5Gb/s Shared bus using electromagnetic connectors for downsizing and lightening satellite processor system by 60%. ISSCC (2015)
Akira Okada, Abdul Raziz Junaidi, Yasuhiro Take, Atsutake Kosuge, Tadahiro Kuroda
Circuit and package design for 44GB/s inductive-coupling DRAM/SoC interface. ASP-DAC (2015)
Li-Chung Hsu, Yasuhiro Take, Atsutake Kosuge, So Hasegawa, Junichiro Kadamoto, Tadahiro Kuroda
Design and analysis for ThruChip design for manufacturing (DFM). ASP-DAC (2015)
Atsutake Kosuge, Shu Ishizuka, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
Analysis and Design of an 8.5-Gb/s/Link Multi-Drop Bus Using Energy-Equipartitioned Transmission Line Couplers. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2015)
Atsutake Kosuge, Wataru Mizuhara, Tsunaaki Shidei, Tsutomu Takeya, Noriyuki Miura, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
A 0.15-mm-Thick Noncontact Connector for MIPI Using a Vertical Directional Coupler. IEEE J. Solid State Circuits 49 (1) (2014)
Atsutake Kosuge, Shu Ishizuka, Lechang Liu, Akira Okada, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
30.6 An electromagnetic clip connector for in-vehicle LAN to reduce wire harness weight by 30%. ISSCC (2014)
Atsutake Kosuge, Wataru Mizuhara, Noriyuki Miura, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched Transmission Line Couplers and Dicode partial-response channel transceivers. ASP-DAC (2013)
Wataru Mizuhara, Tsunaaki Shidei, Atsutake Kosuge, Tsutomu Takeya, Noriyuki Miura, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
A 0.15mm-thick non-contact connector for MIPI using vertical directional coupler. ISSCC (2013)
Atsutake Kosuge, Wataru Mizuhara, Noriyuki Miura, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda
A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and Dicode partial-response channel transceivers. CICC (2012)
Won-Joo Yun, Shinya Nakano, Wataru Mizuhara, Atsutake Kosuge, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda
A 7Gb/s/link non-contact memory module for multi-drop bus system using energy-equipartitioned coupled transmission line. ISSCC (2012)