Yohei Hori

Publication Activity (10 Years)

Years Active: 2000-2024
Publications (10 Years): 12

Top Topics

Fpga Implementation

Information Leakage

Top Venues

IEICE Trans. Inf. Syst.

IACR Cryptol. ePrint Arch.

Publications

Tatsuya Oyama, Mika Sakai, Yohei Hori, Toshihiro Katashita, Takeshi Fujino
FPGA Implementation of Physically Unclonable Functions Based on Multi-threshold Delay Time Measurement Method to Mitigate Modeling Attacks. ACNS Workshops (1) (2024)
Hiroshi Fuketa, Toshihiro Katashita, Yohei Hori, Masakazu Hioki
Multiplication-Free Lookup-Based CNN Accelerator Using Residual Vector Quantization and Its FPGA Implementation. IEEE Access 12 (2024)
Yusuke Yano, Kengo Iokibe, Toshiaki Teshima, Yoshitaka Toyota, Toshihiro Katashita, Yohei Hori
Evaluation of Side-Channel Leakage Simulation by Using EMC Macro-Model of Cryptographic Devices. IEICE Trans. Commun. (2) (2021)
Yasuhiro Ogasahara, Yohei Hori, Toshihiro Katashita, Tomoki Iizuka, Hiromitsu Awano, Makoto Ikeda, Hanpei Koike
Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge-Response pair acquisition using Built-In Self-Test before shipping. Integr. 71 (2020)
Mitsuru Shiozaki, Yohei Hori, Takeshi Fujino
Entropy Estimation of Physically Unclonable Functions. IACR Cryptol. ePrint Arch. 2020 (2020)
Mitsuru Shiozaki, Yohei Hori, Tatsuya Oyama, Masayoshi Shirahata, Takeshi Fujino
Cause Analysis Method of Entropy Loss in Physically Unclonable Functions. ISCAS (2020)
Risa Yashiro, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama
A Deep Learning Attack Countermeasure with Intentional Noise for a PUF-Based Authentication Scheme. SECITC (2019)
Kuniyasu Suzaki, Yohei Hori, Kazukuni Kobara, Mohammad Mannan
DeviceVeil: Robust Authentication for Individual USB Devices Using Physical Unclonable Functions. DSN (2019)
Nicolas Bruneau, Jean-Luc Danger, Adrien Facon, Sylvain Guilley, Soshi Hamaguchi, Yohei Hori, Yousung Kang, Alexander Schaub
Development of the Unified Security Requirements of PUFs During the Standardization Process. SecITC (2018)
Toshihiro Katashita, Masakazu Hioki, Yohei Hori, Hanpei Koike
Development of an Evaluation Platform and Performance Experimentation of Flex Power FPGA Device. IEICE Trans. Inf. Syst. (2) (2018)
Toshihiro Katashita, Yohei Hori, Yasuhiro Ogasahara
Prototype of USB stick-sized PUF module for authentication and key generation. GCCE (2017)
Yasuhiro Ogasahara, Yohei Hori, Hanpei Koike
Implementation of pseudo linear feedback shift register physical unclonable function on silicon. ISCAS (2016)
Yasuhiro Ogasahara, Yohei Hori, Hanpei Koike
Standard cell implementation of buskeeper PUF with symmetric inverters and neighboring cells for passing randomness tests. GCCE (2015)
Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama, Thanh-Ha Le, Julien Bringer, Pirouz Bazargan-Sabet, Shivam Bhasin, Jean-Luc Danger
Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage. IEICE Trans. Electron. (4) (2014)
Yohei Hori, Hyunho Kang, Toshihiro Katashita, Akashi Satoh, Shin-ichi Kawamura, Kazukuni Kobara
Evaluation of Physical Unclonable Functions for 28-nm Process Field-Programmable Gate Arrays. J. Inf. Process. 22 (2) (2014)
Yohei Hori, Toshihiro Katashita, Kazukuni Kobara
Energy and area saving effect of Dynamic Partial Reconfiguration on a 28-nm process FPGA. GCCE (2013)
Yohei Hori, Toshihiro Katashita, Hirofumi Sakane, Kenji Toda, Akashi Satoh
Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption. IEICE Trans. Inf. Syst. (11) (2013)
Toshihiro Katashita, Akihiko Sasaki, Yohei Hori
A novel smart card development platform for evaluating physical attacks and PUFs. GCCE (2013)
Daisuke Fujimoto, Toshihiro Katashita, Akihiko Sasaki, Yohei Hori, Akashi Satoh, Makoto Nagata
A Fast Power Current Simulation of Cryptographic VLSI Circuits for Side Channel Attack Evaluation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2013)
Daisuke Fujimoto, Makoto Nagata, Toshihiro Katashita, Akihiro T. Sasaki, Yohei Hori, Akashi Satoh
A fast power current analysis methodology using capacitor charging model for side channel attack evaluation. HOST (2011)
Yohei Hori, Hyunho Kang, Toshihiro Katashita, Akashi Satoh
Pseudo-LFSR PUF: A Compact, Efficient and Reliable Physical Unclonable Function. ReConFig (2011)
Yohei Hori, Takahiro Yoshida, Toshihiro Katashita, Akashi Satoh
Quantitative and Statistical Performance Evaluation of Arbiter Physical Unclonable Functions on FPGAs. ReConFig (2010)
Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda
Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems. FPL (2008)
Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda
Bitstream Encryption and Authentication Using AES-GCM in Dynamically Reconfigurable Systems. IWSEC (2008)
Yohei Hori, Hiroyuki Yokoyama, Hirofumi Sakane, Kenji Toda
A Secure Content Delivery System Based on a Partially Reconfigurable FPGA. IEICE Trans. Inf. Syst. (5) (2008)
Yohei Hori, Hiroyuki Yokoyama, Hirofumi Sakane, Kenji Toda
A Secure Digital Content Delivery System Based on Partially Reconfigurable Hardware. FPT (2007)
Yohei Hori, Hiroyuki Yokoyama, Kenji Toda
Secure Content Distribution System Based on Run-Time Partial Hardware Reconfiguration. FPL (2006)
Yohei Hori, Tsutomu Maruyama, Kenji Toda
A tsume-shogi processor based on reconfigurable hardware. FPT (2004)
Yohei Hori, Masashi Sonoyama, Tsutomu Maruyama
An FPGA-based processor for shogi mating problems. FPT (2002)
Yohei Hori, Minenobu Seki, Reijer Grimbergen, Tsutomu Maruyama, Tsutomu Hoshino
A Shogi Processor with a Field Programmable Gate Array. Computers and Games (2000)