Kenji Toda

Publication Activity (10 Years)

Years Active: 1983-2014
Publications (10 Years): 0

Top Topics

Compression Algorithm

Top Venues

IEICE Trans. Inf. Syst.

IEICE Trans. Electron.

Publications

Mizuki Watanabe, Kazuyoshi Uematsu, Sun Woog Kim, Kenji Toda, Mineo Sato
Nanophosphor. IEICE Trans. Electron. (11) (2014)
Yohei Hori, Toshihiro Katashita, Hirofumi Sakane, Kenji Toda, Akashi Satoh
Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption. IEICE Trans. Inf. Syst. (11) (2013)
Tadashi Ishigaki, Kenji Toda, Tatsuya Sakamoto, Kazuyoshi Uematsu, Mineo Sato
Crystal Growth of Silicate Phosphors from the Vapor Phase. IEICE Trans. Electron. (11) (2011)
Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda
Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems. FPL (2008)
Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda
Bitstream Encryption and Authentication Using AES-GCM in Dynamically Reconfigurable Systems. IWSEC (2008)
Yohei Hori, Hiroyuki Yokoyama, Hirofumi Sakane, Kenji Toda
A Secure Content Delivery System Based on a Partially Reconfigurable FPGA. IEICE Trans. Inf. Syst. (5) (2008)
Yohei Hori, Hiroyuki Yokoyama, Hirofumi Sakane, Kenji Toda
A Secure Digital Content Delivery System Based on Partially Reconfigurable Hardware. FPT (2007)
Toshihiro Katashita, Yoshinori Yamaguchi, Atusi Maeda, Kenji Toda
FPGA-Based Intrusion Detection System for 10 Gigabit Ethernet. IEICE Trans. Inf. Syst. (12) (2007)
Toshihiro Katashita, Atusi Maeda, Kenji Toda, Yoshinori Yamaguchi
A Method of Generating Highly Efficient String Matching Circuit for Intrusion Detection. FPL (2006)
Toshihiro Katashita, Atusi Maeda, Kenji Toda, Yoshinori Yamaguchi
Highly Efficient String Matching Circuit for IDS with FPGA. FCCM (2006)
Yohei Hori, Hiroyuki Yokoyama, Kenji Toda
Secure Content Distribution System Based on Run-Time Partial Hardware Reconfiguration. FPL (2006)
Kenji Toda, Yoshitaka Kawakami, Shin-ichiro Kousaka, Yutaka Ito, Akira Komeno, Kazuyoshi Uematsu, Mineo Sato
New Silicate Phosphors for a White LED. IEICE Trans. Electron. (10) (2006)
Megumi Hisayuki, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda, Kuniyasu Suzaki
Dynamic Load Balancing Using Network Transferable Computer. ICDCS Workshops (2005)
Hiroyuki Yokoyama, Kenji Toda
FPGA-Based Content Protection System for Embedded Consumer Electronics. RTCSA (2005)
Yohei Hori, Tsutomu Maruyama, Kenji Toda
A tsume-shogi processor based on reconfigurable hardware. FPT (2004)
Megumi Hisayuki, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda, Kuniyasu Suzaki
Adaptable Load Balancing Using Network Transferable Computer Associated with Mobile IP. ICDCS Workshops (2003)
Fuminori Nakanishi, Shinnya Hiraike, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda
A Flexible Scheduling for Automobile Control Using Imprecise Computation and Its Fundamental Evaluation. ICECCS (2000)
Tetsuya Higuchi, Masaya Iwata, Didier Keymeulen, Hidenori Sakanashi, Masahiro Murakawa, Isamu Kajitani, Eiichi Takahashi, Kenji Toda, Mehrdad Salami, Nobuki Kajihara, Nobuyuki Otsu
Real-world applications of analog and digital evolvable hardware . IEEE Trans. Evol. Comput. 3 (3) (1999)
Naoki Asakawa, Kenji Toda, Yoshimi Takeuchi
Automation of Chamfering by an industrial Robot, for the Case of Machined Hole on a Cylindrical Workpiece. ICRA (1998)
Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi
CODA-R: a reconfigurable testbed for real-time parallel computation. RTCSA (1997)
Heejo Lee, Kenji Toda, Jong Kim, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi
Performance comparison of real-time architectures using simulation. RTCSA (1995)
Kenji Toda, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi
A Priority Forwarding Router Chip for Real-Time Interconnection Networks. RTSS (1994)
Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi
The Execution Model and the Architecture for Real-Time Parallel Systems. IFIP Congress (1) (1994)
Kenji Nishida, Kenji Toda, Toshio Shimada, Yoshinori Yamaguchi
The Hardware Architecture of the CODA Real-Time Parallel Processor. PARCO (1993)
Kenji Toda, Kenji Nishida, Shuichi Sakai, Toshio Shimada
A priority forwarding scheme for real-time multistage interconnection networks. RTSS (1992)
Toshio Shimada, Kenji Toda, Kenji Nishida
Real-Time Parallel Architecture for Sensor Funsion. J. Parallel Distributed Comput. 15 (2) (1992)
Kenji Toda, Kenji Nishida, Yoshinobu Uchibori, Shuichi Sakai, Toshio Shimada
Parallel Multi-Context Architecture with High-Speed Synchronization Mechanism. IPPS (1991)
Yoshinori Yamaguchi, Kenji Toda, Toshitsugu Yuba
Evaluation of a Data-Driven Machine with Advanced Control Mechanism. Systems and Computers in Japan 21 (5) (1990)
Kenji Toda, Yoshinobu Uchibori, Toshitsugu Yuba
The Gene Concept and its Implementation for a Dataflow Schemed Parallel Computer. PARLE (1) (1989)
Jayantha A. Herath, Nobuo Saito, Kenji Toda, Yoshinori Yamaguchi, Toshitsugu Yuba
DBCL: Data-Flow Computing Base Language with n-Value Logic. FJCC (1986)
Yoshinori Yamaguchi, Kenji Toda, Jayantha A. Herath, Toshitsugu Yuba
EM-3: A Lisp-Based Data-Driven Machine. FGCS (1984)
Yoshinori Yamaguchi, Kenji Toda, Toshitsugu Yuba
A Performance Evaluation of a Lisp-Based Data-Driven Machine (EM-3) ISCA (1983)