Terrence S. T. Mak

ORCID

Publication Activity (10 Years)

Years Active: 2003-2022
Publications (10 Years): 49

Top Venues

DATE

IEEE Trans. Computers

IEEE Trans. Very Large Scale Integr. Syst.

NOCS

Publications

Ammar Karkar, Nizar Dahir, Terrence S. T. Mak, Kin-Fai Tong
Thermal and Performance Efficient On-Chip Surface-Wave Communication for Many-Core Systems in Dark Silicon Era. ACM J. Emerg. Technol. Comput. Syst. 18 (3) (2022)
Siyuan Xiao, Xiaohang Wang, Maurizio Palesi, Amit Kumar Singh, Liang Wang, Terrence S. T. Mak
On Performance Optimization and Quality Control for Approximate-Communication-Enabled Networks-on-Chip. IEEE Trans. Computers 70 (11) (2021)
Weilong Chen, Xiaohang Wang, Ye Sun, Qiao Hu, Letian Huang, Yingtao Jiang, Amit Kumar Singh, Terrence S. T. Mak, Mei Yang
Evolution of Publications, Subjects, and Co-Authorships in Network-on-Chip Research From a Complex Network Perspective. IEEE Access 9 (2021)
Nizar Dahir, Ammar Karkar, Maurizio Palesi, Terrence S. T. Mak, Alex Yakovlev
Power density aware application mapping in mesh-based network-on-chip architecture: An evolutionary multi-objective approach. Integr. 81 (2021)
Weidong Gao, Terrence S. T. Mak, Lie-Liang Yang
Molecular Type Spread Molecular Shift Keying for Multiple-Access Diffusive Molecular Communications. IEEE Trans. Mol. Biol. Multi Scale Commun. 7 (1) (2021)
Yiming Zhao, Xiaohang Wang, Yingtao Jiang, Liang Wang, Mei Yang, Amit Kumar Singh, Terrence S. T. Mak
On hardware-trojan-assisted power budgeting system attack targeting many core systems. J. Syst. Archit. 109 (2020)
Libo Qian, Da Li, Kefang Qian, Yidie Ye, Yinshui Xia, Terrence S. T. Mak
A Fast-Transient Response Digital Low-Dropout Regulator With Dual-Modes Tuning Technique. IEEE Trans. Circuits Syst. (12) (2020)
Qian Ding, Graham Knight, Terrence S. T. Mak
An Active Silicon Interposer With Low-Power Hybrid Wireless-Wired Clock Distribution Network for Many-Core Systems. IEEE Trans. Very Large Scale Integr. Syst. 28 (9) (2020)
Benjamin J. Fletcher, Terrence S. T. Mak, Shidhartha Das
Simultaneous Wireless Inter-Tier Data and Power Transfer. VLSI Circuits (2020)
Benjamin J. Fletcher, Shidhartha Das, Terrence S. T. Mak
A Spike-Latency Transceiver With Tunable Pulse Control for Low-Energy Wireless 3-D Integration. IEEE J. Solid State Circuits 55 (9) (2020)
Liang Wang, Ping Lv, Leibo Liu, Jie Han, Ho-fung Leung, Xiaohang Wang, Shouyi Yin, Shaojun Wei, Terrence S. T. Mak
A Lifetime Reliability-Constrained Runtime Mapping for Throughput Optimization in Many-Core Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (9) (2019)
Liang Wang, Xiaohang Wang, Ho-fung Leung, Terrence S. T. Mak
A Non-Minimal Routing Algorithm for Aging Mitigation in 2D-Mesh NoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (7) (2019)
Benjamin J. Fletcher, Terrence S. T. Mak, Shidhartha Das
A 10.8pJ/bit Pulse-Position Inductive Transceiver for Low-Energy Wireless 3D Integration. ESSCIRC (2019)
Benjamin J. Fletcher, Shidhartha Das, Terrence S. T. Mak
A Low-Energy Inductive Transceiver using Spike-Latency Encoding for Wireless 3D Integration. ISLPED (2019)
Bing Li, Xiaohang Wang, Amit Kumar Singh, Terrence S. T. Mak
On Runtime Communication and Thermal-Aware Application Mapping and Defragmentation in 3D NoC Systems. IEEE Trans. Parallel Distributed Syst. 30 (12) (2019)
Weidong Gao, Terrence S. T. Mak, Lie-Liang Yang
Type-Spread Molecular Communications: Principles and Inter-Symbol Interference Mitigation. ICC (2019)
Siyuan Xiao, Xiaohang Wang, Maurizio Palesi, Amit Kumar Singh, Terrence S. T. Mak
ACDC: An Accuracy- and Congestion-aware Dynamic Traffic Control Method for Networks-on-Chip. DATE (2019)
Benjamin J. Fletcher, Shidhartha Das, Terrence S. T. Mak
CoDAPT: A Concurrent Data And Power Transceiver for Fully Wireless 3D-ICs. DATE (2019)
Benjamin J. Fletcher, Shidhartha Das, Terrence S. T. Mak
Design and Optimization of Inductive-Coupling Links for 3-D-ICs. IEEE Trans. Very Large Scale Integr. Syst. 27 (3) (2019)
Qian Ding, Benjamin J. Fletcher, Terrence S. T. Mak
Globally Wireless Locally Wired (GloWiLoW): A Clock Distribution Network for Many-Core Systems. ISCAS (2018)
Ling Wang, Terrence S. T. Mak
A Fault-Tolerant Routing Algorithm Using Tunnels in Fault Blocks for Network-on-Chip. J. Circuits Syst. Comput. 27 (2) (2018)
Benjamin J. Fletcher, Shidhartha Das, Chi-Sang Poon, Terrence S. T. Mak
Low-power 3D integration using inductive coupling links for neurotechnology applications. DATE (2018)
Xiaohang Wang, Amit Kumar Singh, Bing Li, Yang Yang, Hong Li, Terrence S. T. Mak
Bubble Budgeting: Throughput Optimization for Dynamic Workloads by Exploiting Dark Cores in Many Core Systems. IEEE Trans. Computers 67 (2) (2018)
Shufan Yang, KongFatt Wong-Lin, James Andrew, Terrence S. T. Mak, T. Martin McGinnity
A neuro-inspired visual tracking method based on programmable system-on-chip platform. Neural Comput. Appl. 30 (9) (2018)
Yiming Zhao, Xiaohang Wang, Yingtao Jiang, Mei Yang, Amit Kumar Singh, Terrence S. T. Mak
On a New Hardware Trojan Attack on Power Budgeting of Many Core Systems. SoCC (2018)
Benjamin J. Fletcher, Shidhartha Das, Terrence S. T. Mak
A high-speed design methodology for inductive coupling links in 3D-ICs. DATE (2018)
Ammar Karkar, Terrence S. T. Mak, Nizar Dahir, Ra'ed Al-Dujaily, Kin-Fai Tong, Alex Yakovlev
Network-on-Chip Multicast Architectures Using Hybrid Wire and Surface-Wave Interconnects. IEEE Trans. Emerg. Top. Comput. 6 (3) (2018)
Zijun Long, Xiaohang Wang, Yingtao Jiang, Guofeng Cui, Li Zhang, Terrence S. T. Mak
Improving the efficiency of thermal covert channels in multi-/many-core systems. DATE (2018)
Terrence S. T. Mak, Hiroki Matsutani, Partha Pratim Pande
Special session on bringing cores closer together: The wireless revolution in on-chip communication. VTS (2018)
Yee Leung, Kwong-Sak Leung, Man Hon Wong, Terrence S. T. Mak, Kwan-Yau Cheung, Leung-Yau Lo, Wei Ying Yi, Yuan-Lin Dong
An integrated web-based air pollution decision support system - a prototype. Int. J. Geogr. Inf. Sci. 32 (9) (2018)
Li Zhang, Xiaohang Wang, Yingtao Jiang, Mei Yang, Terrence S. T. Mak, Amit Kumar Singh
Effectiveness of HT-assisted sinkhole and blackhole denial of service attacks targeting mesh networks-on-chip. J. Syst. Archit. 89 (2018)
Xiaohang Wang, Yingtao Jiang, Mei Yang, Hong Li, Terrence S. T. Mak
HRC: A 3D NoC Architecture with Genuine Support for Runtime Thermal-Aware Task Management. IEEE Trans. Computers 66 (10) (2017)
Bing Li, Xiaohang Wang, Amit Kumar Singh, Terrence S. T. Mak
On Runtime Communication- and Thermal-aware Application Mapping in 3D NoC. NOCS (2017)
Liang Wang, Xiaohang Wang, Ho-fung Leung, Terrence S. T. Mak
Throughput Optimization for Lifetime Budgeting in Many-Core Systems. ACM Great Lakes Symposium on VLSI (2017)
Michael Opoku Agyeman, Quoc-Tuan Vien, Ali Ahmadinia, Alexandre Yakovlev, Kin-Fai Tong, Terrence S. T. Mak
A Resilient 2-D Waveguide Communication Fabric for Hybrid Wired-Wireless NoC Design. IEEE Trans. Parallel Distributed Syst. 28 (2) (2017)
Quoc-Tuan Vien, Michael Opoku Agyeman, Tuan Anh Le, Terrence S. T. Mak
On the Nanocommunications at THz Band in Graphene-Enabled Wireless Network-on-Chip. CoRR (2017)
Liang Wang, Xiaohang Wang, Ho-fung Leung, Terrence S. T. Mak
Runtime task mapping for lifetime budgeting in many-core systems. FDL (2017)
Junwen Luo, Graeme Coapes, Terrence S. T. Mak, Tadashi Yamazaki, Chung Tin, Patrick Degenaar
Real-Time Simulation of Passage-of-Time Encoding in Cerebellum Using a Scalable FPGA-Based System. IEEE Trans. Biomed. Circuits Syst. 10 (3) (2016)
Michael Opoku Agyeman, Quoc-Tuan Vien, Gary Hill, Scott J. Turner, Terrence S. T. Mak
An Efficient Channel Model for Evaluating Wireless NoC Architectures. SBAC-PAD (Workshops) (2016)
Xiaohang Wang, Baoxin Zhao, Ling Wang, Terrence S. T. Mak, Mei Yang, Yingtao Jiang, Masoud Daneshtalab
A pareto-optimal runtime power budgeting scheme for many-core systems. Microprocess. Microsystems 46 (2016)
Michael Opoku Agyeman, Quoc-Tuan Vien, Terrence S. T. Mak
An Analytical Channel Model for Emerging Wireless Networks-on-Chip. CSE/EUC/DCABES (2016)
Xiaohang Wang, Amit Kumar Singh, Bing Li, Yang Yang, Terrence S. T. Mak, Hong Li
Bubble budgeting: throughput optimization for dynamic workloads by exploiting dark cores in many core systems. NOCS (2016)
Wei-Ying Yi, Kwong-Sak Leung, Yee Leung, Helen Mei-Ling Meng, Terrence S. T. Mak
Modular sensor system (MSS) for urban air pollution monitoring. IEEE SENSORS (2016)
Xiaohang Wang, Ting Fei, Boquan Zhang, Terrence S. T. Mak
On runtime adaptive tile defragmentation for resource management in many-core systems. Microprocess. Microsystems 46 (2016)
Liang Wang, Xiaohang Wang, Terrence S. T. Mak
Adaptive Routing Algorithms for Lifetime Reliability Optimization in Network-on-Chip. IEEE Trans. Computers 65 (9) (2016)
Ra'ed Al-Dujaily, An Li, Robert G. Maunder, Terrence S. T. Mak, Bashir M. Al-Hashimi, Lajos Hanzo
A Scalable Turbo Decoding Algorithm for High-Throughput Network-on-Chip Implementation. IEEE Access 4 (2016)
Qiang Liu, Wenqing Ji, Qi Chen, Terrence S. T. Mak
IP Protection of Mesh NoCs Using Square Spiral Routing. IEEE Trans. Very Large Scale Integr. Syst. 24 (4) (2016)
Jim Ng, Xiaohang Wang, Amit Kumar Singh, Terrence S. T. Mak
Defragmentation for Efficient Runtime Resource Management in NoC-Based Many-Core Systems. IEEE Trans. Very Large Scale Integr. Syst. 24 (11) (2016)
Xiaohang Wang, Baoxin Zhao, Terrence S. T. Mak, Mei Yang, Yingtao Jiang, Masoud Daneshtalab
On Fine-Grained Runtime Power Budgeting for Networks-on-Chip Systems. IEEE Trans. Computers 65 (9) (2016)
Xiaohang Wang, Baoxin Zhao, Terrence S. T. Mak, Mei Yang, Yingtao Jiang, Masoud Daneshtalab
An efficient runtime power allocation scheme for many-core systems inspired from auction theory. Integr. 50 (2015)
Ammar Karkar, Kin-Fai Tong, Terrence S. T. Mak, Alexandre Yakovlev
Mixed wire and surface-wave communication fabrics for decentralized on-chip multicasting. DATE (2015)
Michael Opoku Agyeman, Kenneth Tong, Terrence S. T. Mak
An Improved Wireless Communication Fabric for Emerging Network-on-Chip Design. FNC/MobiSPC (2015)
Xiaohang Wang, Tengfei Wang, Terrence S. T. Mak, Mei Yang, Yingtao Jiang, Masoud Daneshtalab
Fine-grained runtime power budgeting for networks-on-chip. ASP-DAC (2015)
Masoud Daneshtalab, Maurizio Palesi, Terrence S. T. Mak
Introduction to the special issue on NoC-based many-core architectures. Comput. Electr. Eng. 45 (2015)
Michael Opoku Agyeman, Ji-Xiang Wan, Quoc-Tuan Vien, Wen Zong, Alex Yakovlev, Kenneth Tong, Terrence S. T. Mak
On the Design of Reliable Hybrid Wired-Wireless Network-on-Chip Architectures. MCSoC (2015)
Wen Zong, Michael Opoku Agyeman, Xiaohang Wang, Terrence S. T. Mak
Unbiased Regional Congestion Aware Selection Function for NoCs. NOCS (2015)
Michael Opoku Agyeman, Wen Zong, Ji-Xiang Wan, Alex Yakovlev, Kenneth Tong, Terrence S. T. Mak
Novel Hybrid Wired-Wireless Network-on-Chip Architectures: Transducer and Communication Fabric Design. NOCS (2015)
Michael Opoku Agyeman, Kin-Fai Tong, Terrence S. T. Mak
Towards reliability and performance-aware Wireless Network-on-Chip design. DFTS (2015)
Jim Ng, Xiaohang Wang, Amit Kumar Singh, Terrence S. T. Mak
DeFrag: Defragmentation for Efficient Runtime Resource Allocation in NoC-Based Many-core Systems. PDP (2015)
Wei Ying Yi, Kin Ming Lo, Terrence S. T. Mak, Kwong-Sak Leung, Yee Leung, Helen Mei-Ling Meng
A Survey of Wireless Sensor Network Based Air Pollution Monitoring Systems. Sensors 15 (12) (2015)
Qiang Liu, Terrence S. T. Mak, Tao Zhang, Xinyu Niu, Wayne Luk, Alex Yakovlev
Power-Adaptive Computing System Design for Solar-Energy-Powered Embedded Systems. IEEE Trans. Very Large Scale Integr. Syst. 23 (8) (2015)
Masoud Daneshtalab, Maurizio Palesi, Terrence S. T. Mak
Introduction to the Special Issue on Network-on-Chip Architectures. Comput. Electr. Eng. 40 (8) (2014)
Nizar Dahir, Ghaith Tarawneh, Terrence S. T. Mak, Ra'ed Al-Dujaily, Alex Yakovlev
Design and Implementation of Dynamic Thermal-Adaptive Routing Strategy for Networks-on-Chip. PDP (2014)
Junwen Luo, Graeme Coapes, Terrence S. T. Mak, Tadashi Yamazaki, Chung Tin, Patrick Degenaar
A scalable FPGA-based cerebellum for passage-of-time representation. EMBC (2014)
Xiaohang Wang, Zhiming Li, Mei Yang, Yingtao Jiang, Masoud Daneshtalab, Terrence S. T. Mak
Agile frequency scaling for adaptive power allocation in many-core systems powered by renewable energy sources. ASP-DAC (2014)
Junwen Luo, Graeme Coapes, Patrick Degenaar, Tadashi Yamazaki, Terrence S. T. Mak, Chung Tin
A real-time silicon cerebellum spiking neural model based on FPGA. ISIC (2014)
Ghaith Tarawneh, Alex Yakovlev, Terrence S. T. Mak
Eliminating Synchronization Latency Using Sequenced Latching. IEEE Trans. Very Large Scale Integr. Syst. 22 (2) (2014)
Ammar Karkar, Nizar Dahir, Ra'ed Al-Dujaily, Kenneth Tong, Terrence S. T. Mak, Alex Yakovlev
Hybrid wire-surface wave architecture for one-to-many communication in networks-on-chip. DATE (2014)
Liang Wang, Xiaohang Wang, Terrence S. T. Mak
Dynamic Programming-Based Lifetime Reliability Optimization in Networks-on-Chip. VLSI-SoC (Selected Papers) (2014)
Nizar Dahir, Ra'ed Al-Dujaily, Terrence S. T. Mak, Alex Yakovlev
Thermal Optimization in Network-on-Chip-Based 3D Chip Multiprocessors Using Dynamic Programming Networks. ACM Trans. Embed. Comput. Syst. 13 (4s) (2014)
Xiaohang Wang, Baoxin Zhao, Terrence S. T. Mak, Mei Yang, Yingtao Jiang, Masoud Daneshtalab, Maurizio Palesi
Adaptive power allocation for many-core systems inspired from multiagent auction model. DATE (2014)
Jim Ng, Terrence S. T. Mak
A Novel Partitioning Algorithm for Optimizing Neuron-to-Neuron Pathways through NoC in BMI. NoCArc@MICRO (2014)
Xiaohang Wang, Mei Yang, Yingtao Jiang, Peng Liu, Masoud Daneshtalab, Maurizio Palesi, Terrence S. T. Mak
On self-tuning networks-on-chip for dynamic network-flow dominance adaptation. ACM Trans. Embed. Comput. Syst. 13 (2s) (2014)
Nizar Dahir, Terrence S. T. Mak, Fei Xia, Alexandre Yakovlev
Modeling and Tools for Power Supply Variations Analysis in Networks-on-Chip. IEEE Trans. Computers 63 (3) (2014)
Wing Oi Siu, Terrence S. T. Mak
Intra- and inter-chip voltage droop analysis using a power delivery grid model. ISIC (2014)
Liang Wang, Xiaohang Wang, Terrence S. T. Mak
Dynamic programming-based lifetime aware adaptive routing algorithm for Network-on-Chip. VLSI-SoC (2014)
Xiaohang Wang, Terrence S. T. Mak, Mei Yang, Yingtao Jiang, Masoud Daneshtalab, Maurizio Palesi
On self-tuning networks-on-chip for dynamic network-flow dominance adaptation. NOCS (2013)
Junwen Luo, Patrick Degenaar, Graeme Coapes, Alex Yakovlev, Terrence S. T. Mak, Peter Andras
Towards reliable hybrid bio-silicon integration using novel adaptive control system. ISCAS (2013)
Wen Zong, Xiaohang Wang, Terrence S. T. Mak
On multicast for dynamic and irregular on-chip networks using dynamic programming method. NoCArc@MICRO (2013)
Xiaohang Wang, Zhiming Li, Mei Yang, Yingtao Jiang, Masoud Daneshtalab, Terrence S. T. Mak
A low cost, high performance dynamic-programming-based adaptive power allocation scheme for many-core architectures in the dark silicon era. ESTIMedia (2013)
Ra'ed Al-Dujaily, Nizar Dahir, Terrence S. T. Mak, Fei Xia, Alex Yakovlev
Dynamic programming-based runtime thermal management (DPRTM): An online thermal control strategy for 3D-NoC systems. ACM Trans. Design Autom. Electr. Syst. 19 (1) (2013)
Ammar Karkar, Janice E. Turner, Kenneth Tong, Ra'ed Al-Dujaily, Terrence S. T. Mak, Alex Yakovlev, Fei Xia
Hybrid wire-surface wave interconnects for next-generation networks-on-chip. IET Comput. Digit. Tech. 7 (6) (2013)
Xiaohang Wang, Mei Yang, Yingtao Jiang, Maurizio Palesi, Peng Liu, Terrence S. T. Mak, Nader Bagherzadeh
Efficient multicast schemes for 3-D Networks-on-Chip. J. Syst. Archit. 59 (9) (2013)
Ra'ed Al-Dujaily, Terrence S. T. Mak, Kai-Pui Lam, Fei Xia, Alex Yakovlev, Chi-Sang Poon
Dynamic On-Chip Thermal Optimization for Three-Dimensional Networks-On-Chip. Comput. J. 56 (6) (2013)
Junshi Wang, Xiaohang Wang, Letian Huang, Terrence S. T. Mak, Guangjun Li
A Fault-Tolerant Routing Algorithm for NoC Using Farthest Reachable Routers. DASC (2013)
Bo Yu, Rosa H. M. Chan, Terrence S. T. Mak, Yihe Sun, Chi-Sang Poon
On-Chip Systolic Networks for Real-Time Tracking of Pairwise Correlations Between Neurons in a Large-Scale Network. IEEE Trans. Biomed. Eng. 60 (1) (2013)
Nizar Dahir, Terrence S. T. Mak, Ra'ed Al-Dujaily, Alex Yakovlev
Highly adaptive and deadlock-free routing for three-dimensional networks-on-chip. IET Comput. Digit. Tech. 7 (6) (2013)
Athanasios K. Grivas, Terrence S. T. Mak, Alex Yakovlev, Jonny Wray
Novel Multi-Layer Network Decomposition boosting acceleration of multi-core algorithms. ASAP (2013)
Ghaith Tarawneh, Terrence S. T. Mak, Alex Yakovlev
Intra-chip physical parameter sensor for FPGAS using flip-flop metastability. FPL (2012)
Andrew Mundy, Terrence S. T. Mak, Alex Yakovlev, Simon Davidson, Steve B. Furber
Large-Scale On-Chip Dynamic Programming Network Inferences Using Moderated Inter-core Communication. ACSD (2012)
Ammar Karkar, Ra'ed Al-Dujaily, Alex Yakovlev, Kenneth Tong, Terrence S. T. Mak
Surface wave communication system for on-chip and off-chip interconnects. NoCArc@MICRO (2012)
Nizar Dahir, Ra'ed Al-Dujaily, Alex Yakovlev, Petros Missailidis, Terrence S. T. Mak
Deadlock-free and plane-balanced adaptive routing for 3D networks-on-chip. NoCArc@MICRO (2012)
Ra'ed Al-Dujaily, Terrence S. T. Mak, Fei Xia, Alex Yakovlev, Maurizio Palesi
Embedded Transitive Closure Network for Runtime Deadlock Detection in Networks-on-Chip. IEEE Trans. Parallel Distributed Syst. 23 (7) (2012)
Graeme Coapes, Terrence S. T. Mak, Junwen Luo, Alex Yakovlev, Chi-Sang Poon
A scalable FPGA-based design for field programmable large-scale ion channel simulations. FPL (2012)
Nizar Dahir, Terrence S. T. Mak, Fei Xia, Alex Yakovlev
Minimizing power supply noise through harmonic mappings in networks-on-chip. CODES+ISSS (2012)
Terrence S. T. Mak
Truncation error analysis of MTBF computation for multi-latch synchronizers. Microelectron. J. 43 (2) (2012)
Yu Zhou, Terrence S. T. Mak, Alex Yakovlev
Run-Time Concurrency Tuning for Peak Power Modulation in Energy Harvesting Systems. ACSD (2011)
Allann Al-armaghany, Bo Yu, Terrence S. T. Mak, Kin-Fai Tong, Yihe Sun
Feasibility study for future implantable neural-silicon interface devices. EMBC (2011)
Bo Yu, Terrence S. T. Mak, Leslie Smith, Yihe Sun, Alex Yakovlev, Chi-Sang Poon
Memory efficient on-line streaming for multichannel spike train analysis. EMBC (2011)
Nizar Dahir, Terrence S. T. Mak, Alex Yakovlev
Communication centric on-chip power grid models for networks-on-chip. VLSI-SoC (2011)

Terrence S. T. Mak.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Terrence S. T. Mak