Sanjukta Bhanja

Publication Activity (10 Years)

Years Active: 1998-2023
Publications (10 Years): 16

Top Topics

Undergraduate Engineering

Efficient Processing

Fault Tolerance

Top Venues

ACM J. Emerg. Technol. Comput. Syst.

Publications

Sébastien Ollivier, Stephen Longofono, Prayash Dutta, Jingtong Hu, Sanjukta Bhanja, Alex K. Jones
Toward Comprehensive Shifting Fault Tolerance for Domain-Wall Memories With PIETT. IEEE Trans. Computers 72 (4) (2023)
Prayash Dutta, Albert Lee, Kang L. Wang, Alex K. Jones, Sanjukta Bhanja
A Multi-domain Magneto Tunnel Junction for Racetrack Nanowire Strips. CoRR (2022)
Kawsher A. Roxy, Stephen Longofono, Sébastien Olliver, Sanjukta Bhanja, Alex K. Jones
Pinning Fault Mode Modeling for DWM Shifting. CoRR (2022)
Kawsher A. Roxy, Stephen Longofono, Sébastien Olliver, Sanjukta Bhanja, Alex K. Jones
Pinning Fault Mode Modeling for DWM Shifting. IEEE Trans. Circuits Syst. II Express Briefs 69 (7) (2022)
Sébastien Ollivier, Stephen Longofono, Prayash Dutta, Jingtong Hu, Sanjukta Bhanja, Alex K. Jones
CORUSCANT: Fast Efficient Processing-in-Racetrack Memories. MICRO (2022)
Sébastien Ollivier, Stephen Longofono, Prayash Dutta, Jingtong Hu, Sanjukta Bhanja, Alex K. Jones
PIRM: Processing In Racetrack Memories. CoRR (2021)
Arifa Hoque, Alex K. Jones, Sanjukta Bhanja
XDWM: A 2D Domain Wall Memory. CoRR (2021)
Ilia A. Bautista Adames, Sudeep Sarkar, Sanjukta Bhanja
MatlabHTM: A sequence memory model of neocortical layers for anomaly detection. SoftwareX 11 (2020)
Sébastien Ollivier, Donald Kline Jr., Kawsher A. Roxy, Rami G. Melhem, Sanjukta Bhanja, Alex K. Jones
The Power of Orthogonality. ISVLSI (2019)
Sébastien Ollivier, Donald Kline Jr., Kawsher A. Roxy, Rami G. Melhem, Sanjukta Bhanja, Alex K. Jones
Leveraging Transverse Reads to Correct Alignment Faults in Domain Wall Memories. DSN (2019)
Kawsher A. Roxy, Sanjukta Bhanja
Non-Boolean Computing with Spintronic Devices. Found. Trends Electron. Des. Autom. 12 (1) (2018)
Arifa Hoque, William Sutton, Kawsher A. Roxy, Sanjukta Bhanja
Integrating emerging memory technologies into undergraduate logic design course: The impact of context based teaching. MSE (2017)
Kawsher A. Roxy, Sanjukta Bhanja
Variability tolerant reading of nanomagnetic energy minimizing co-processor. MWSCAS (2017)
Ilia A. Bautista Adames, Jayita Das, Sanjukta Bhanja
Survey of Emerging Technology Based Physical Unclonable Funtions. ACM Great Lakes Symposium on VLSI (2016)
Jayita Das, Kevin Scott, Sanjukta Bhanja
MRAM PUF: Using Geometric and Resistive Variations in MRAM Cells. ACM J. Emerg. Technol. Comput. Syst. 13 (1) (2016)
Aida Todri-Sanial, Sanjukta Bhanja
Guest Editorial: Special Issue on Advances in Design of Ultra-Low Power Circuits and Systems in Emerging Technologies. ACM J. Emerg. Technol. Comput. Syst. 12 (2) (2015)
Jayita Das, Syed M. Alam, Sanjukta Bhanja
Nano Magnetic STT-Logic Partitioning for Optimum Performance. IEEE Trans. Very Large Scale Integr. Syst. 22 (1) (2014)
Jayita Das, Syed M. Alam, Sanjukta Bhanja
Non-destructive variability tolerant differential read for non-volatile logic. MWSCAS (2012)
Jayita Das, Syed M. Alam, Sanjukta Bhanja
Ultra-Low Power Hybrid CMOS-Magnetic Logic Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2012)
Sneta Mishra, Sanjukta Bhanja
Evaluation of circuit styles and VLSI logic designs of pentacene OTFTs. MWSCAS (2012)
Sanjukta Bhanja, Javier F. Pulecio
A review of magnetic cellular automata systems. ISCAS (2011)
Saket Srivastava, Arjun Asthana, Sanjukta Bhanja, Sudeep Sarkar
QCAPro - An error-power estimation tool for QCA circuit design. ISCAS (2011)
Jayita Das, Syed M. Alam, Sanjukta Bhanja
Low Power Magnetic Quantum Cellular Automata Realization Using Magnetic Multi-Layer Structures. IEEE J. Emerg. Sel. Topics Circuits Syst. 1 (3) (2011)
Anita Kumari, Sanjukta Bhanja
Landauer Clocking for Magnetic Cellular Automata (MCA) Arrays. IEEE Trans. Very Large Scale Integr. Syst. 19 (4) (2011)
Karthikeyan Lingasubramanian, Syed M. Alam, Sanjukta Bhanja
Maximum error modeling for fault-tolerant computation using maximum a posteriori (MAP) hypothesis. Microelectron. Reliab. 51 (2) (2011)
D. K. Karunaratne, Srinath Rajaram, Kristin Kusmierek, Paromita De, Sanjukta Bhanja
Novel knowledge module on fusion of logic and memory to undergraduate students. MSE (2011)
Thara Rejimon, Karthikeyan Lingasubramanian, Sanjukta Bhanja
Probabilistic Error Modeling for Nano-Domain Logic Circuits. IEEE Trans. Very Large Scale Integr. Syst. 17 (1) (2009)
Karthikeyan Lingasubramanian, Sanjukta Bhanja
An Error Model to Study the Behavior of Transient Errors in Sequential Circuits. VLSI Design (2009)
Anita Kumari, Javier F. Pulecio, Sanjukta Bhanja
Defect characterization in magnetic field coupled arrays. ISQED (2009)
Anita Kumari, Sanjukta Bhanja
CNT logic knowledge module integrated in digital CMOS logic design course. MSE (2009)
Karthikeyan Lingasubramanian, Syed M. Alam, Sanjukta Bhanja
Study of Circuit-Specific Error Bounds for Fault-Tolerant Computation using Maximum a posteriori (MAP) Hypothesis CoRR (2009)
Sanjukta Bhanja, Sudeep Sarkar
Thermal Switching Error Versus Delay Tradeoffs in Clocked QCA Circuits. IEEE Trans. Very Large Scale Integr. Syst. 16 (5) (2008)
Saket Srivastava, Sanjukta Bhanja
Integrating a Nanologic Knowledge Module Into an Undergraduate Logic Design Course. IEEE Trans. Educ. 51 (3) (2008)
Sanjukta Bhanja, Marco Ottavi, Fabrizio Lombardi, Salvatore Pontarelli
QCA Circuits for Robust Coplanar Crossing. J. Electron. Test. 23 (2-3) (2007)
Saket Srivastava, Sanjukta Bhanja
Integrating Nano-logic into an Undergraduate Logic Design Course. MSE (2007)
Karthikeyan Lingasubramanian, Sanjukta Bhanja
Probabilistic maximum error modeling for unreliable logic circuits. ACM Great Lakes Symposium on VLSI (2007)
Saket Srivastava, Sanjukta Bhanja
Hierarchical Probabilistic Macromodeling for QCA Circuits. IEEE Trans. Computers 56 (2) (2007)
Thara Rejimon, Sanjukta Bhanja
A Timing-Aware Probabilistic Model for Single-Event-Upset Analysis. IEEE Trans. Very Large Scale Integr. Syst. 14 (10) (2006)
Sanjukta Bhanja, Marco Ottavi, Fabrizio Lombardi, Salvatore Pontarelli
Novel designs for thermally robust coplanar crossing in QCA. DATE (2006)
Thara Rejimon, Sanjukta Bhanja
Wide Limited Switch Dynamic Logic Circuit Implementations. VLSI Design (2006)
Sanjukta Bhanja, Karthikeyan Lingasubramanian, N. Ranganathan
A stimulus-free graphical probabilistic switching model for sequential circuits using dynamic bayesian networks. ACM Trans. Design Autom. Electr. Syst. 11 (3) (2006)
Thara Rejimon, Sanjukta Bhanja
An Accurate Probalistic Model for Error Detection. VLSI Design (2005)
Sanjukta Bhanja, Karthikeyan Lingasubramanian, N. Ranganathan
Estimation of Switching Activity in Sequential Circuits Using Dynamic Bayesian Networks. VLSI Design (2005)
Vijay K. Jain, Sanjukta Bhanja, Glenn H. Chapman, Lavanya Doddannagari, Nguyen Nguyen
A parallel architecture for the ICA algorithm: DSP plane of a 3-D heterogeneous sensor. ICASSP (5) (2005)
Vijay K. Jain, Sanjukta Bhanja, Glenn H. Chapman, Lavanya Doddannagari
A highly reconfigurable computing array: DSP plane of a 3D heterogeneous SoC. SoCC (2005)
Nirmal Ramalingam, Sanjukta Bhanja
Causal probabilistic input dependency learning for switching model in VLSI circuits. ACM Great Lakes Symposium on VLSI (2005)
Shiva Shankar Ramani, Sanjukta Bhanja
Any-time probabilistic switching model using bayesian networks. ISLPED (2004)
Sanjukta Bhanja, N. Ranganathan
Cascaded Bayesian inferencing for switching activity estimation with correlated inputs. IEEE Trans. Very Large Scale Integr. Syst. 12 (12) (2004)
Sanjukta Bhanja, N. Ranganathan
Switching activity estimation of VLSI circuits using Bayesian networks. IEEE Trans. Very Large Scale Integr. Syst. 11 (4) (2003)
Sanjukta Bhanja, N. Ranganathan
Modeling Switching Activity Using Cascaded Bayesian Networks for Correlated Input Streams. ICCD (2002)
Sanjukta Bhanja, N. Ranganathan
Switching Activity Estimation of Large Circuits using Multiple Bayesian Networks. VLSI Design (2002)
Sanjukta Bhanja, N. Ranganathan
Dependency Preserving Probabilistic Modeling of Switching Activity using Bayesian Networks. DAC (2001)
Sanjukta Bhanja, Lynn M. Fletcher-Heath, Lawrence O. Hall, Dmitry B. Goldgof, Jeffrey P. Krischer
A Qualitative Expert System for Clinical Trial Assignment. FLAIRS Conference (1998)