Jayita Das

Publication Activity (10 Years)

Years Active: 2011-2016
Publications (10 Years): 2

Top Topics

Design Considerations

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Very Large Scale Integr. Syst.

ACM Great Lakes Symposium on VLSI

Publications

Ilia A. Bautista Adames, Jayita Das, Sanjukta Bhanja
Survey of Emerging Technology Based Physical Unclonable Funtions. ACM Great Lakes Symposium on VLSI (2016)
Jayita Das, Kevin Scott, Sanjukta Bhanja
MRAM PUF: Using Geometric and Resistive Variations in MRAM Cells. ACM J. Emerg. Technol. Comput. Syst. 13 (1) (2016)
Jayita Das, Swaroop Ghosh
Energy Barrier Model of SRAM for Improved Energy and Error Rates. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2014)
Jayita Das, Syed M. Alam, Sanjukta Bhanja
Nano Magnetic STT-Logic Partitioning for Optimum Performance. IEEE Trans. Very Large Scale Integr. Syst. 22 (1) (2014)
Jayita Das, Syed M. Alam, Sanjukta Bhanja
Non-destructive variability tolerant differential read for non-volatile logic. MWSCAS (2012)
Jayita Das, Syed M. Alam, Sanjukta Bhanja
Ultra-Low Power Hybrid CMOS-Magnetic Logic Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2012)
Jayita Das, Syed M. Alam, Sanjukta Bhanja
Low Power Magnetic Quantum Cellular Automata Realization Using Magnetic Multi-Layer Structures. IEEE J. Emerg. Sel. Topics Circuits Syst. 1 (3) (2011)