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S. Mahapatra
Publication Activity (10 Years)
Years Active: 2001-2018
Publications (10 Years): 2
Top Topics
Low Cost
Film Thickness
Solar Cell
Dynamic Random Access Memory
Top Venues
IRPS
DRC
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Publications
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K. R. Khiangte Amlta
,
A. Laha
,
S. Mahapatra
,
U. Gangway
Epitaxial Gd2O3on Si (111) Substrate by Sputtering to Enable Low Cost SOI.
DRC
(2018)
Vincent Huard
,
C. Ndiaye
,
M. Arabi
,
Narendra Parihar
,
X. Federspiel
,
Souhir Mhira
,
S. Mahapatra
,
Alain Bravaix
Key parameters driving transistor degradation in advanced strained SiGe channels.
IRPS
(2018)
Nilesh Goel
,
P. Dubey
,
J. Kawa
,
S. Mahapatra
Impact of time-zero and NBTI variability on sub-20nm FinFET based SRAM at low voltages.
IRPS
(2015)
Muhammad Ashraful Alam
,
Haldun Kufluoglu
,
D. Varghese
,
S. Mahapatra
A comprehensive model for PMOS NBTI degradation: Recent progress.
Microelectron. Reliab.
47 (6) (2007)
Sandip Debnath
,
S. Mahapatra
,
Ranjan Gangopadhyay
Analysis of an optical packet switch with partially shared buffer and wavelength conversion.
IET Commun.
1 (4) (2007)
T. S. Venkatesan
,
K. Deepika
,
S. Mahapatra
The Jahn-Teller and pseudo-Jahn-Teller effects in the anion photoelectron spectroscopy of B3 cluster.
J. Comput. Chem.
27 (10) (2006)
Muhammad Ashraful Alam
,
S. Mahapatra
A comprehensive model of PMOS NBTI degradation.
Microelectron. Reliab.
45 (1) (2005)
S. Mahapatra
,
S. Shukuri
,
Jeff Bude
Substrate Bias Effect on Cycling Induced Performance Degradation of Flash EEPROMs.
VLSI Design
(2003)
G. Shrivastav
,
S. Mahapatra
,
V. Ramgopal Rao
,
J. Vasi
,
K. G. Anil
,
C. Fink
,
Walter Hansch
,
I. Eisele
erformance Optimization Of 60 Nm Channel Length Vertical Mosfets Using Channel Engineering.
VLSI Design
(2001)
A. Kumar
,
S. Mahapatra
,
R. Lal
,
V. Ramgopal Rao
Multi-frequency transconductance technique for interface characterization of deep sub-micron SOI-MOSFETs.
Microelectron. Reliab.
41 (7) (2001)