Philippe Hoogvorst

Publication Activity (10 Years)

Years Active: 1991-2016
Publications (10 Years): 2

Top Topics

Digital Watermarking

Top Venues

IACR Cryptol. ePrint Arch.

Publications

Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache
Improving the Big Mac Attack on Elliptic Curve Cryptography. The New Codebreakers (2016)
Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache
Improving the Big Mac Attack on Elliptic Curve Cryptography. IACR Cryptol. ePrint Arch. 2015 (2015)
Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache
Dynamic Countermeasure Against the Zero Power Analysis. IACR Cryptol. ePrint Arch. 2013 (2013)
Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache
A synthesis of side-channel attacks on elliptic curve cryptography in smart-cards. J. Cryptogr. Eng. 3 (4) (2013)
Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache
Dynamic countermeasure against the Zero Power Analysis. ISSPIT (2013)
Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache
Low-Cost Countermeasure against RPA. CARDIS (2012)
Guillaume Barbu, Philippe Hoogvorst, Guillaume Duc
Application-Replay Attack on Java Cards: When the Garbage Collector Gets Confused. ESSoS (2012)
Guillaume Barbu, Philippe Hoogvorst, Guillaume Duc
Tampering with Java Card Exceptions - The Exception Proves the Rule. SECRYPT (2012)
Cédric Murdica, Sylvain Guilley, Jean-Luc Danger, Philippe Hoogvorst, David Naccache
Same Values Power Analysis Using Special Points on Elliptic Curves. COSADE (2012)
Guillaume Barbu, Guillaume Duc, Philippe Hoogvorst
Java Card Operand Stack: Fault Attacks, Combined Attacks and Countermeasures. CARDIS (2011)
Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin
A Secure Asynchronous FPGA Architecture, Experimental Results and Some Debug Feedback CoRR (2011)
Sylvain Guilley, Laurent Sauvage, Florent Flament, Vinh-Nga Vong, Philippe Hoogvorst, Renaud Pacalet
Evaluation of Power Constant Dual-Rail Logics Countermeasures against DPA with Design Time Security Metrics. IEEE Trans. Computers 59 (9) (2010)
Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst
High speed true random number generator based on open loop structures in FPGAs. Microelectron. J. 40 (11) (2009)
Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Philippe Hoogvorst
Area optimization of cryptographic co-processors implemented in dual-rail with precharge positive logic. FPL (2008)
Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin
Physical Design of FPGA Interconnect to Prevent Information Leakage. ARC (2008)
Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger
Efficient tiling patterns for reconfigurable gate arrays. SLIP (2008)
Sumanta Chaudhuri, Jean-Luc Danger, Philippe Hoogvorst, Sylvain Guilley
Efficient tiling patterns for reconfigurable gate arrays. FPGA (2008)
Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Danger, Laurent Sauvage, Philippe Hoogvorst, Maxime Nassar, Tarik Graba, Vinh-Nga Vong
Place-and-Route Impact on the Security of DPL Designs in FPGAs. HOST (2008)
Philippe Hoogvorst, Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Danger, Taha Beyrouthy, Laurent Fesquet
A Reconfigurable Programmable Logic Block for a Multi-Style Asynchronous FPGA resistant to Side-Channel Attacks CoRR (2008)
Sumanta Chaudhuri, Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Jean-Luc Danger
An 8x8 run-time reconfigurable FPGA embedded in a SoC. DAC (2008)
Sylvain Guilley, Laurent Sauvage, Philippe Hoogvorst, Renaud Pacalet, Guido Marco Bertoni, Sumanta Chaudhuri
Security Evaluation of WDDL and SecLib Countermeasures against Power Attacks. IEEE Trans. Computers 57 (11) (2008)
M. Abdelaziz Elaabid, Sylvain Guilley, Philippe Hoogvorst
Template Attacks with a Power Model. IACR Cryptol. ePrint Arch. 2007 (2007)
Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Renaud Pacalet, Yves Mathieu
Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors. IEEE Des. Test Comput. 24 (6) (2007)
Sylvain Guilley, Philippe Hoogvorst, Renaud Pacalet
A fast pipelined multi-mode DES architecture operating in IP representation. Integr. 40 (4) (2007)
Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin, Sumanta Chaudhuri, Sylvain Guilley, Jean-Luc Danger, Philippe Hoogvorst
A Novel Asynchronous e-FPGA Architecture for Security Applications. FPT (2007)
Philippe Hoogvorst, Sylvain Guilley, Sumanta Chaudhuri, Alin Razafindraibe, Taha Beyrouthy, Laurent Fesquet
A Reconfigurable Cell for a Multi-Style Asynchronous FPGA. ReCoSoC (2007)
Sumanta Chaudhuri, Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst
FASE: An Open Run-Time Reconfigurable FPGA Architecture for Tamper-Resistant and Secure Embedded Systems. ReConFig (2006)
Sylvain Guilley, Philippe Hoogvorst, Yves Mathieu, Renaud Pacalet
The "Backend Duplication" Method. CHES (2005)
Sylvain Guilley, Philippe Hoogvorst
The Proof by 2M-1: a Low-Cost Method to Check Arithmetic Computations. SEC (2005)
Sylvain Guilley, Philippe Hoogvorst, Yves Mathieu, Renaud Pacalet, Jean Provost
CMOS Structures Suitable for Secured Hardware. DATE (2004)
Sylvain Guilley, Philippe Hoogvorst, Renaud Pacalet
Differential Power Analysis Model and Some Results. CARDIS (2004)
Philippe Hoogvorst, Ronan Keryell, Philippe Matherat, Nicolas Paris
POMP or How to Design a Massively Parallel Machine with Small Developments. PARLE (1) (1991)