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A Reconfigurable Cell for a Multi-Style Asynchronous FPGA.
Philippe Hoogvorst
Sylvain Guilley
Sumanta Chaudhuri
Alin Razafindraibe
Taha Beyrouthy
Laurent Fesquet
Published in:
ReCoSoC (2007)
Keyphrases
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field programmable gate array
hardware implementation
low cost
digital signal
systolic array
high speed
computing systems
real time
signal processing
embedded systems
hardware design
hardware architecture
power reduction
reconfigurable hardware
parallel computing
fpga device
general purpose
image processing