Florent Flament

Publication Activity (10 Years)

Years Active: 2007-2012
Publications (10 Years): 0

Top Topics

Computer Graphics

Normalized Cross Correlation

Top Venues

Int. J. Reconfigurable Comput.

Publications

Laurent Sauvage, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu
Blind Cartography for Side Channel Attacks: Cross-Correlation Cartography. Int. J. Reconfigurable Comput. 2012 (2012)
Olivier Meynard, Denis Réal, Florent Flament, Sylvain Guilley, Naofumi Homma, Jean-Luc Danger
Enhancement of simple electro-magnetic attacks by pre-characterization in frequency domain and demodulation techniques. DATE (2011)
Laurent Sauvage, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu
Cross-Correlation Cartography. ReConFig (2010)
Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu
Exploiting Dual-Output Programmable Blocks to Balance Secure Dual-Rail Logics. Int. J. Reconfigurable Comput. 2010 (2010)
Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger, Florent Flament
Entropy-based Power Attack. HOST (2010)
Olivier Meynard, Denis Réal, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Frédéric Valette
Characterization of the Electromagnetic Side Channel in Frequency Domain. Inscrypt (2010)
Youssef Souissi, Maxime Nassar, Sylvain Guilley, Jean-Luc Danger, Florent Flament
First Principal Components Analysis: A New Side Channel Distinguisher. ICISC (2010)
Shivam Bhasin, Sylvain Guilley, Florent Flament, Nidhal Selmane, Jean-Luc Danger
Countering early evaluation: an approach towards robust dual-rail precharge logic. WESS (2010)
Sylvain Guilley, Laurent Sauvage, Florent Flament, Vinh-Nga Vong, Philippe Hoogvorst, Renaud Pacalet
Evaluation of Power Constant Dual-Rail Logics Countermeasures against DPA with Design Time Security Metrics. IEEE Trans. Computers 59 (9) (2010)
Zouha Cherif, Florent Flament, Jean-Luc Danger, Shivam Bhasin, Sylvain Guilley, Hervé Chabanne
Evaluation of White-Box and Grey-Box Noekeon Implementations in FPGA. ReConFig (2010)
Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu
DPL on Stratix II FPGA: What to Expect?. ReConFig (2009)
Shivam Bhasin, Jean-Luc Danger, Florent Flament, Tarik Graba, Sylvain Guilley, Yves Mathieu, Maxime Nassar, Laurent Sauvage, Nidhal Selmane
Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow. ReConFig (2009)
Sumanta Chaudhuri, Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Jean-Luc Danger
An 8x8 run-time reconfigurable FPGA embedded in a SoC. DAC (2008)
Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Renaud Pacalet, Yves Mathieu
Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors. IEEE Des. Test Comput. 24 (6) (2007)