Peter Jamieson

Publication Activity (10 Years)

Years Active: 2000-2024
Publications (10 Years): 33

Top Topics

Reinforcement Learning

Computer Engineering

Top Venues

ACM Trans. Embed. Comput. Syst.

Publications

Amin Sarihi, Ahmad Patooghy, Abdel-Hameed A. Badawy, Peter Jamieson
The Seeker's Dilemma: Realistic Formulation and Benchmarking for Hardware Trojan Detection. CoRR (2024)
Ricardo S. Ferreira, Michael Canesche, Peter Jamieson, Omar P. Vilela Neto, José A. M. Nacif
Examples and tutorials on using Google Colab and Gradio to create online interactive student-learning modules. Comput. Appl. Eng. Educ. 32 (4) (2024)
Amin Sarihi, Ahmad Patooghy, Peter Jamieson, Abdel-Hameed A. Badawy
Trojan playground: a reinforcement learning framework for hardware Trojan insertion and detection. J. Supercomput. 80 (10) (2024)
Amin Sarihi, Peter Jamieson, Ahmad Patooghy, Abdel-Hameed A. Badawy
TrojanForge: Adversarial Hardware Trojan Examples with Reinforcement Learning. CoRR (2024)
Amin Sarihi, Peter Jamieson, Ahmad Patooghy, Abdel-Hameed A. Badawy
Multi-criteria Hardware Trojan Detection: A Reinforcement Learning Approach. CoRR (2023)
Amin Sarihi, Peter Jamieson, Ahmad Patooghy, Abdel-Hameed A. Badawy
Multi-Criteria Hardware Trojan Detection: A Reinforcement Learning Approach. MWSCAS (2023)
Peter Jamieson, Suman Bhunia, Dhananjai M. Rao
With ChatGPT, do we have to rewrite our learning objectives - CASE study in Cybersecurity. CoRR (2023)
Amin Sarihi, Ahmad Patooghy, Peter Jamieson, Abdel-Hameed A. Badawy
Trojan Playground: A Reinforcement Learning Framework for Hardware Trojan Insertion and Detection. CoRR (2023)
Peter Jamieson, Suman Bhunia, Dhananjai M. Rao
With ChatGPT, Do We have to Rewrite Our Learning Objectives - CASE Study in Cybersecurity. FIE (2023)
Peter Jamieson, Donald Blank, Janelle Ghanem, Tyler McGrew, Giancarlo Corti
A Methodology for an FPGA Implementation of a Programmable Logic Controller to Control an Atomic Layer Deposition System. Int. J. Reconfigurable Comput. 2022 (2022)
Peter Jamieson, Indrima Upadhyay
A Technique to Create Weaker Abstract Board Game Agents via Reinforcement Learning. CoRR (2022)
Amin Sarihi, Ahmad Patooghy, Peter Jamieson, Abdel-Hameed A. Badawy
Hardware Trojan Insertion Using Reinforcement Learning. ACM Great Lakes Symposium on VLSI (2022)
Amin Sarihi, Ahmad Patooghy, Peter Jamieson, Abdel-Hameed A. Badawy
Hardware Trojan Insertion Using Reinforcement Learning. CoRR (2022)
Alejandro Cabrerizo, Will Zeurcher, Thomas Wright, Peter Jamieson
-like Bricks to Go from the Real to the Virtual World. HCI (44) (2021)
Isaac Nelson, Ricardo S. Ferreira, José Augusto Miranda Nacif, Peter Jamieson
Is It Time to Include High-Level Synthesis Design in Digital System Education for Undergraduate Computer Engineers? ISCAS (2021)
Michael Canesche, Marcelo M. Menezes, Westerley Carvalho, Frank Sill Torres, Peter Jamieson, José Augusto Miranda Nacif, Ricardo S. Ferreira
TRAVERSAL: A Fast and Adaptive Graph-Based Placement and Routing for CGRAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (8) (2021)
Peter Jamieson, Santhiya Sampath Kumar, José Augusto Miranda Nacif, Ricardo S. Ferreira
Analyzing a Low-bit rate Audio Codec - Codec2 - on an FPGA. CSCI (2021)
Michael Canesche, Westerley Carvalho, Lucas Reis, Matheus A. de Oliveira, Salles V. G. Magalhães, Peter Jamieson, José Augusto Miranda Nacif, Ricardo Ferreira
You Only Traverse Twice: A YOTT Placement, Routing, and Timing Approach for CGRAs. ACM Trans. Embed. Comput. Syst. 20 (5s) (2021)
Peter Jamieson, Ricardo S. Ferreira, José Augusto Miranda Nacif
Personalizing Online Computer Engineering Resources and Labs for Digital, Embedded, and Computer System Courses. FIE (2021)
Peter Jamieson, Ricardo S. Ferreira, José Augusto Miranda Nacif
GA-lapagos, an open-source c framework including a python-based system for data analysis. GECCO Companion (2020)
Westerley Carvalho, Michael Canesche, Lucas Reis, Frank Sill Torres, Lucas B. da Silva, Peter Jamieson, José Augusto Miranda Nacif, Ricardo S. Ferreira
A Design Exploration of Scalable Mesh-based Fully Pipelined Accelerators. FPT (2020)
Lucas Bragança da Silva, Ricardo S. Ferreira, Michael Canesche, Marcelo M. Menezes, Maria D. Vieira, Jeronimo Costa Penha, Peter Jamieson, José Augusto Miranda Nacif
READY: A Fine-Grained Multithreading Overlay Framework for Modern CPU-FPGA Dataflow Applications. ACM Trans. Embed. Comput. Syst. 18 (5s) (2019)
Fredy A. M. Alves, Peter Jamieson, Lucas Bragança, Ricardo Ferreira, José Augusto Miranda Nacif
Lessons learned on which applications benefit when implemented on CPU-FPGA heterogeneous system. SAMOS (2018)
Alan Ehret, Peter Jamieson, Michel A. Kinsy
Scalable Open-Source Reconfigurable Architecture for Bacterial Quorum Sensing Simulations. HEART (2018)
Peter Jamieson, Ahmed Sanaullah, Martin C. Herbordt
Benchmarking Heterogeneous HPC Systems Including Reconfigurable Fabrics: Community Aspirations for Ideal Comparisons. HPEC (2018)
Fredy Augusto M. Alves, Peter Jamieson, Lucas B. da Silva, Ricardo S. Ferreira, José Augusto Miranda Nacif
Designing a collision detection accelerator on a heterogeneous CPU-FPGA platform. ReConFig (2017)
Peter Jamieson
WIP - A modification to the case study method to teach students to read academic papers. FIE (2017)
Peter Jamieson, Lindsay D. Grace
A framework to help analyze if creating a game to teach a learning objective is worth the work. FIE (2016)
Amber Franklin, Ryan Sunderhaus, Chris Bell, Peter Jamieson
Improved method for creating criterion maps for automatic mind map analysis. FIE (2016)
Peter Jamieson, Lindsay D. Grace, Naoki Mizuno, Chris Bell, Darrel Davis
A simple multi-player video game framework for experimenting and teaching cultural understanding. MindTrek (2016)
Peter Jamieson, Jeff Herdtner
More missing the Boat - Arduino, Raspberry Pi, and small prototyping boards and engineering education needs them. FIE (2015)
Amber Franklin, Tuo Li, Peter Jamieson, Julie Semlak, Walter Vanderbush
Evaluating metrics for automatic mind map assessment in various classes. FIE (2015)
Lindsay Grace, Peter Jamieson, Naoki Mizuno, Boyu Zhang
VerilogTown: cars, crashes and hardware design. Advances in Computer Entertainment (2015)
Farnaz Gharibian, Lesley Shannon, Peter Jamieson
A methodology for identifying and placing heterogeneous cluster groups based on placement proximity data (abstract only). FPGA (2014)
Robert Collier, Christian Fobel, Ryan Pattison, Gary Gréwal, Shawki Areibi, Peter Jamieson
Advancing genetic algorithm approaches to field programmable gate array placement with enhanced recombination operators. Evol. Intell. 7 (4) (2014)
Farnaz Gharibian, Lesley Shannon, Peter Jamieson
Identifying and placing heterogeneously-sized cluster groupings based on FPGA placement data. FPL (2014)
Peter Jamieson, Lindsay Grace, Jack Hall, Aditya Wibowo
Metaheuristic Entry Points for Harnessing Human Computation in Mainstream Games. HCI (26) (2013)
Peter Jamieson, Farnaz Gharibian, Lesley Shannon
Supergenes in a genetic algorithm for heterogeneous FPGA placement. IEEE Congress on Evolutionary Computation (2013)
Farnaz Gharibian, Lesley Shannon, Peter Jamieson, Kevin Chung
Analyzing System-Level Information's Correlation to FPGA Placement. ACM Trans. Reconfigurable Technol. Syst. 6 (3) (2013)
Peter Jamieson
More graph comparison techniques on mind maps to provide students with feedback. FIE (2013)
Jonathan Rose, Jason Luu, Chi Wai Yu, Opal Densmore, Jeffrey Goeders, Andrew Somerville, Kenneth B. Kent, Peter Jamieson, Jason Helge Anderson
The VTR project: architecture and CAD for FPGAs from verilog to routing. FPGA (2012)
Peter Jamieson
Using modern graph analysis techniques on mind maps to help quantify learning. FIE (2012)
Peter Jamieson
Early project based learning improvements via a "star trek engineering room" game framework, and competition. FIE (2011)
Jason Luu, Ian Kuon, Peter Jamieson, Ted Campbell, Andy Ye, Wei Mark Fang, Kenneth B. Kent, Jonathan Rose
VPR 5.0: FPGA CAD and architecture exploration tools with single-driver routing, heterogeneity and process scaling. ACM Trans. Reconfigurable Technol. Syst. 4 (4) (2011)
Peter Jamieson
Persistent CAD for in-the-field Power Optimization. ERSA (2010)
Tobias Becker, Peter Jamieson, Wayne Luk, Peter Y. K. Cheung, Tero Rissa
Power Characterisation for Fine-Grain Reconfigurable Fabrics. Int. J. Reconfigurable Comput. 2010 (2010)
Peter Jamieson, Darrel Davis, Brooke Spangler
The Mythical Creature Approach - A Simulation Alternative to Building Computer Architectures. FECS (2010)
Peter Jamieson, Kenneth B. Kent, Farnaz Gharibian, Lesley Shannon
Odin II - An Open-Source Verilog HDL Synthesis Tool for CAD Research. FCCM (2010)
Peter Jamieson
Revisiting Genetic Algorithms for the FPGA Placement Problem. GEM (2010)
Peter Jamieson, Tobias Becker, Peter Y. K. Cheung, Wayne Luk, Tero Rissa, Teemu Pitkänen
Benchmarking and evaluating reconfigurable architectures targeting the mobile domain. ACM Trans. Design Autom. Electr. Syst. 15 (2) (2010)
Farnaz Gharibian, Lesley Shannon, Peter Jamieson
Finding System-Level Information and Analyzing Its Correlation to FPGA Placement. FPL (2010)
Jason Luu, Ian Kuon, Peter Jamieson, Ted Campbell, Andy Ye, Wei Mark Fang, Jonathan Rose
VPR 5.0: FPGA cad and architecture exploration tools with single-driver routing, heterogeneity and process scaling. FPGA (2009)
Peter Jamieson, Tobias Becker, Wayne Luk, Peter Y. K. Cheung, Tero Rissa, Teemu Pitkänen
Benchmarking Reconfigurable Architectures in the Mobile Domain. FCCM (2009)
Luke Terry, Vladimir Roitch, Shoeb Tufail, Kirit Singh, Omair Taraq, Wayne Luk, Peter Jamieson
Harnessing Human Computation Cycles for the FPGA Placement Problem. ERSA (2009)
Tobias Becker, Peter Jamieson, Wayne Luk, Peter Y. K. Cheung, Tero Rissa
Towards benchmarking energy efficiency of reconfigurable architectures. FPL (2008)
Peter Jamieson, Jonathan Rose
Architecting Hard Crossbars on FPGAs and Increasing their Area Efficiency with Shadow Clusters. FPT (2007)
Peter Jamieson, Jonathan Rose
Enhancing the area-efficiency of FPGAs with hard circuits using shadow clusters. FPT (2006)
Peter Jamieson, Jonathan Rose
A Verilog RTL Synthesis Tool for Heterogeneous FPGAs. FPL (2005)
Angelos Bilas, Courtney R. Gibson, Reza Azimi, Rosalia Christodoulopoulou, Peter Jamieson
Using System Emulation to Model Next-Generation Shared Virtual Memory Clusters. Clust. Comput. 6 (4) (2003)
Peter Jamieson, Angelos Bilas
CableS: Thread Control and Memory Management Extensions for Shared Virtual Memory Clusters. HPCA (2002)
Peter Jamieson, Angelos Bilas
CableS : Thread Control and Memory System Extensions for Shared Virtual Memory Clusters. WOMPAT (2001)
Kathy Lynch, Angela Carbone, Peter Jamieson, David Arnott
Adopting a studio-based education approach into information technology (poster session). ACSE (2000)