Peter C. Paliwoda

Publication Activity (10 Years)

Years Active: 2007-2021
Publications (10 Years): 5

Top Topics

Computer Network Security

Technical Issues

Air Conditioning

Technological Advances

Top Venues

Publications

Maria Toledano-Luque, Peter C. Paliwoda, Mohamed Nour, Thomas Kauerauf, Byoung Min, Germain Bossu, Mahesh Siddabathula, Tanya Nigam
Off-state TDDB in FinFET Technology and its Implication for Safe Operating Area. IRPS (2021)
Peter C. Paliwoda, Maria Toledano-Luque, Tanya Nigam, F. Guarin, M. Nour, S. Cimino, L. Pantisano, A. Gupta, O. H. Gonzalez, M. Hauser, W. Liu, A. Vayshenker, D. Ioannou, D. Lee, L. Jiang, P. Yee, Stewart Rauch, B. Min
Self-heating characterization and its applications in technology development. NATW (2020)
Peter C. Paliwoda, Mohamed A. Rabie, Oscar D. Restrepo, Eduardo Cruz Silva, E. Kaltalioglu, Fernando Guarin, Kenneth Barnett, Jeffrey Johnson, William Taylor, Myra Boenke, Byoung Min
Thermal Characterization and TCAD Modeling of a Power Amplifier in 45RFSOI for 5G mmWave Applications. IRPS (2020)
Peter C. Paliwoda, Zakariae Chbili, A. Kerber, D. Singh, Durga Misra
Ambient temperature and layout impact on self-heating characterization in FinFET devices. IRPS (2018)
D. Singh, O. D. Restrepo, P. P. Manik, N. Rao Mavilla, H. Zhang, Peter C. Paliwoda, S. Pinkett, Y. Deng, E. Cruz Silva, J. B. Johnson, M. Bajaj, S. Furkay, Z. Chbili, A. Kerber, C. Christiansen, S. Narasimha, E. Maciejewski, S. Samavedam, C.-H. Lin
Bottom-up methodology for predictive simulations of self-heating in aggressively scaled process technologies. IRPS (2018)
Harika Manem, Peter C. Paliwoda, Garrett S. Rose
A hybrid cmos/nano fpga architecture built fromprogrammable majority logic arrays. ACM Great Lakes Symposium on VLSI (2008)
Nadine Gergel-Hackett, Garrett S. Rose, Peter C. Paliwoda, Christina A. Hacker, Curt A. Richter
On-chip characterization of molecular electronic devices using CMOS: the design and simulation of a hybrid circuit based on experimental molecular electronic device results. ACM Great Lakes Symposium on VLSI (2007)