A hybrid cmos/nano fpga architecture built fromprogrammable majority logic arrays.
Harika ManemPeter C. PaliwodaGarrett S. RosePublished in: ACM Great Lakes Symposium on VLSI (2008)
Keyphrases
- high speed
- hardware implementation
- real time
- hardware architecture
- software implementation
- delay insensitive
- hardware architectures
- low cost
- dedicated hardware
- analog vlsi
- hardware design
- focal plane
- fpga technology
- fpga implementation
- single chip
- modal logic
- logic programming
- cmos image sensor
- pipelined architecture
- reasoning engine
- real time image processing
- cmos technology
- classical logic
- management system
- power consumption
- asynchronous circuits
- hd video
- infrared
- xilinx virtex
- random access memory
- low power
- image processing algorithms
- data acquisition
- systolic array
- field programmable gate array
- logic circuits
- parallel architecture
- image processing