Pedro J. Gil

Publication Activity (10 Years)

Years Active: 1996-2018
Publications (10 Years): 3

Top Topics

Error Correction

Error Detection

Top Venues

Publications

Joaquin Gracia-Moran, Luis J. Saiz-Adalid, Juan-Carlos Baraza-Calvo, Pedro J. Gil
Correction of Adjacent Errors with Low Redundant Matrix Error Correction Codes. LADC (2018)
Ilya Tuzov, Juan Carlos Ruiz, David de Andrés, Pedro J. Gil
Speeding-Up Simulation-Based Fault Injection of Complex HDL Models. LADC (2016)
Luis J. Saiz-Adalid, Pedro J. Gil, Juan Carlos Ruiz, Joaquin Gracia-Moran, Daniel Gil-Tomas, Juan-Carlos Baraza-Calvo
Ultrafast Error Correction Codes for Double Error Detection/Correction. EDCC (2016)
Jaime Espinosa, David de Andrés, Pedro J. Gil
Increasing the Dependability of VLSI Systems through Early Detection of Fugacious Faults. EDCC (2015)
Luis J. Saiz-Adalid, Pedro Reviriego, Pedro J. Gil, Salvatore Pontarelli, Juan Antonio Maestro
MCU Tolerance in SRAMs Through Low-Redundancy Triple Adjacent Error Correction. IEEE Trans. Very Large Scale Integr. Syst. 23 (10) (2015)
Luis J. Saiz-Adalid, Pedro J. Gil, Joaquin Gracia-Moran, Daniel Gil-Tomas, Juan-Carlos Baraza-Calvo
Ultrafast Single Error Correction Codes for Protecting Processor Registers. EDCC (2015)
Luis J. Saiz-Adalid, Pedro J. Gil, Juan-Carlos Baraza-Calvo, Juan-Carlos Ruiz-Garcia, Daniel Gil-Tomas, Joaquin Gracia-Moran
Modified Hamming Codes to Enhance Short Burst Error Detection in Semiconductor Memories (Short Paper). EDCC (2014)
Joaquin Gracia-Moran, Juan-Carlos Ruiz-Garcia, Juan-Carlos Baraza-Calvo, David de Andrés, Pedro J. Gil
Improving the Transfer of Safety and Security Competences to Industry: The RISKY Approach. EWDC (2013)
Luis J. Saiz-Adalid, Pedro J. Gil, Joaquin Gracia-Moran, Juan-Carlos Baraza-Calvo
Using Interleaving to Avoid the Effects of Multiple Adjacent Faults in On-Chip Interconnection Lines. EWDC (2013)
Jaime Espinosa, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
The Challenge of Detection and Diagnosis of Fugacious Hardware Faults in VLSI Designs. EWDC (2013)
Jaime Espinosa, David de Andrés, Juan Carlos Ruiz, Pedro J. Gil
Tolerating multiple faults with proximate manifestations in FPGA-based critical designs for harsh environments. FPL (2012)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
Using Performance, Energy Consumption, and Resilience Experimental Measures to Evaluate Routing Protocols for Ad Hoc Networks. NCA (2011)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
Coarse-grained resilience benchmarking using logic score of preferences: ad hoc networks as a case study. EWDC (2011)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
Resilience-Driven Parameterisation of Ad Hoc Routing Protocols: olsrd as a Case Study. SRDS (2011)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
On Selecting Representative Faultloads to Guide the Evaluation of Ad Hoc Networks. LADC (2011)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
Towards benchmarking routing protocols in wireless mesh networks. Ad Hoc Networks 9 (8) (2011)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
Attack Injection to Support the Evaluation of Ad Hoc Networks. SRDS (2010)
David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
Using Dependability, Performance, Area and Energy Consumption Experimental Measures to Benchmark IP Cores. LADC (2009)
Sara Blanc, Alberto Bonastre, Pedro J. Gil
Dependability assessment of by-wire control systems using fault injection. J. Syst. Archit. 55 (2) (2009)
Juan-Carlos Ruiz-Garcia, David de Andrés, Pedro J. Gil
Design and Deployment of a Generic ECC-based Fault Tolerance Mechanism for Embedded HW Cores. ETFA (2009)
David de Andrés, Jesus Friginal, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
An Attack Injection Approach to Evaluate the Robustness of Ad Hoc Networks. PRDC (2009)
Joaquin Gracia, Luis J. Saiz, Juan Carlos Baraza, Daniel Gil, Pedro J. Gil
Analysis of the influence of intermittent faults in a microcontroller. DDECS (2008)
Daniel Gil, Luis J. Saiz, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil
Injecting intermittent faults for the dependability validation of commercial microcontrollers. HLDVT (2008)
Juan-Carlos Ruiz-Garcia, David de Andrés, Sara Blanc, Pedro J. Gil
Generic Design and Automatic Deployment of NMR Strategies on HW Cores. PRDC (2008)
David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
Fault Emulation for Dependability Evaluation of VLSI Systems. IEEE Trans. Very Large Scale Integr. Syst. 16 (4) (2008)
Juan Carlos Baraza, Joaquin Gracia, Sara Blanc, Daniel Gil, Pedro J. Gil
Enhancement of Fault Injection Techniques Based on the Modification of VHDL Code. IEEE Trans. Very Large Scale Integr. Syst. 16 (6) (2008)
David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
Dependability Assessment for the Selection of Embedded Cores. EDCC (2008)
David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
Run-Time Reconfiguration for Emulating Transient Faults in VLSI Systems. DSN (2006)
David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
Fast Emulation of Permanent Faults in VLSI Systems. FPL (2006)
David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
FADES: a fault emulation tool for fast dependability assessment. FPT (2006)
Juan Pardo, José Carlos Campelo, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
Temporal Characterization of Embedded Systems Using Nexus. EDCC (2006)
David de Andrés, José Albaladejo, Lenin Lemus, Pedro J. Gil
Fast Run-Time Reconfiguration for SEU Injection. EDCC (2005)
Juan Carlos Baraza, Joaquin Gracia, Daniel Gil, Pedro J. Gil
Improvement of fault injection techniques based on VHDL code modification. HLDVT (2005)
Juan-Carlos Ruiz-Garcia, José Carlos Campelo, Pedro J. Gil, Juan Pardo
On-chip Debugging-based Fault Emulation for Robustness Evaluation of Embedded Software Components. PRDC (2005)
Daniel Gil, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil
Impact of Faults in Combinational Logic of Commercial Microcontrollers. EDCC (2005)
Sara Blanc, Joaquin Gracia, Pedro J. Gil
Experiences during the Experimental Validation of the Time-Triggered Architecture. DATE (2004)
Daniel Gil, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil
Analysis of the influence of processor hidden registers on the accuracy of fault injection techniques. HLDVT (2004)
Juan-Carlos Ruiz-Garcia, Pedro Yuste, Pedro J. Gil, Lenin Lemus
On Benchmarking the Dependability of Automotive Engine Control Applications. DSN (2004)
Daniel Gil, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil
Study, comparison and application of different VHDL-based fault injection techniques for the experimental validation of a fault-tolerant system. Microelectron. J. 34 (1) (2003)
Pedro Yuste, David de Andrés, Lenin Lemus, Juan José Serrano, Pedro J. Gil
INERTE: Integrated NExus-Based Real-Time Fault Injection Tool for Embedded Systems. DSN (2003)
Sara Blanc, Pedro J. Gil
Improving the Multiple Errors Detection Coverage in Distributed Embedded Systems. SRDS (2003)
Pedro Yuste, Juan-Carlos Ruiz-Garcia, Lenin Lemus, Pedro J. Gil
Non-intrusive Software-Implemented Fault Injection in Embedded Systems. LADC (2003)
Sara Blanc, Joaquin Gracia, Pedro J. Gil
A Fault Hypothesis Study on the TTP/C Using VHDL-Based and Pin-Level Fault Injection Techniques. DFT (2002)
Joaquin Gracia, Daniel Gil, Juan Carlos Baraza, Pedro J. Gil
Using VHDL-Based Fault Injection to exercise Error Detection Mechanisms in the Time-Triggered Architecture. PRDC (2002)
Juan Carlos Baraza, Joaquin Gracia, Daniel Gil, Pedro J. Gil
A prototype of a VHDL-based fault injection tool: description and application. J. Syst. Archit. 47 (10) (2002)
Joaquin Gracia, Juan Carlos Baraza, Daniel Gil, Pedro J. Gil
Comparison and Application of Different VHDL-Based Fault Injection Techniques. DFT (2001)
Joaquin Gracia, Juan Carlos Baraza, Daniel Gil, Pedro J. Gil
A Study of the Experimental Validation of Fault-Tolerant Systems Using Different VHDL-Based Fault Injection Techniques. IOLTW (2001)
Juan Carlos Baraza, Joaquin Gracia, Daniel Gil, Pedro J. Gil
A Prototype of a VHDL-Based Fault Injection Tool. DFT (2000)
José V. Busquets-Mataix, Daniel Gil, Pedro J. Gil, Andy J. Wellings
Techniques to increase the schedulable utilization of cache-based preemptive real-time systems. J. Syst. Archit. 46 (4) (2000)
Daniel Gil, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil
A Study of the Effects of Transient Fault Injection into the VHDL Model of a Fault-Tolerant Microcomputer System. IOLTW (2000)
Lenin Lemus, David de Andrés, Pedro J. Gil
An alternative to unify performance and reliability analysis of industrial applications. ESM (2000)
José Carlos Campelo, Pedro Yuste, Francisco Rodríguez, Pedro J. Gil, Juan José Serrano
Dependability Evaluation of Fault Tolerant Distributed Industrial Control Systems. IPPS/SPDP Workshops (1999)
José Carlos Campelo, Pedro Yuste, Francisco Rodríguez, Pedro J. Gil, Juan José Serrano
Hierarchical Reliability and Safety Models of Fault Tolerant Distributed Industrial Control Systems. SAFECOMP (1999)
Daniel Gil, R. Martínez, J. V. Busquets, Juan Carlos Baraza, Pedro J. Gil
Fault Injection into VHDL Models: Experimental Validation of a Fault Tolerant Microcomputer System. EDCC (1999)
José Carlos Campelo, Francisco Rodríguez, Pedro J. Gil, Juan José Serrano
Design and Validation of a Distributed Industrial Control System's Nodes. SRDS (1999)
José Carlos Campelo, Francisco Rodríguez, Alicia Rubio, Rafael Ors, Pedro J. Gil, Lenin Lemus, J. V. Busquets, José Albaladejo, Juan José Serrano
Distributed industrial control systems: a fault-tolerant architecture. Microprocess. Microsystems 23 (2) (1999)
Daniel Gil, Juan Carlos Baraza, J. V. Busquets, Pedro J. Gil
Fault Injection into VHDL Models: Analysis of the Error Syndrome of a Microcomputer System. EUROMICRO (1998)
José V. Busquets-Mataix, Juan José Serrano, Rafael Ors, Pedro J. Gil, Andy J. Wellings
Adding instruction cache effect to schedulability analysis of preemptive real-time systems. IEEE Real Time Technology and Applications Symposium (1996)
José V. Busquets-Mataix, Juan José Serrano, Rafael Ors Carot, Pedro J. Gil, Andrew J. Wellings
Adding Instruction Cache Effect to an Exact Schedulability Analysis of Preemptive Real-Time Systems. RTS (1996)
Vicente Santonja, Marina Alonso, Xavier Molero, Juan José Serrano, Pedro J. Gil, Rafael Ors
Dependability Models of RAID Using Stochastic Activity Networks. EDCC (1996)
José V. Busquets-Mataix, Juan José Serrano, Rafael Ors, Pedro J. Gil, Andy J. Wellings
Using harmonic task-sets to increase the schedulable utilization of cache-based preemptive real-time systems. RTCSA (1996)