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MCU Tolerance in SRAMs Through Low-Redundancy Triple Adjacent Error Correction.
Luis J. Saiz-Adalid
Pedro Reviriego
Pedro J. Gil
Salvatore Pontarelli
Juan Antonio Maestro
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2015)
Keyphrases
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error correction
channel coding
error analysis
data hiding
error detection
error correcting
error control
response time
watermarking scheme
low power consumption
ldpc codes
magnetic tape