Juan Carlos Ruiz

Publication Activity (10 Years)

Years Active: 2009-2024
Publications (10 Years): 14

Top Topics

Iterative Refinement

Hardware Software Partitioning

Statistical Models

Design Space Exploration

Top Venues

J. Parallel Distributed Comput.

Publications

Juan Carlos Ruiz, David de Andrés, Luis J. Saiz-Adalid, Joaquin Gracia-Moran
Zero-Space In-Weight and In-Bias Protection for Floating-Point-based CNNs. EDCC (2024)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Reversing FPGA architectures for speeding up fault injection: does it pay? EDCC (2022)
Miquel Martínez, Juan Carlos Ruiz, Nuno Antunes, David de Andrés, Marco Vieira
A Multi-Criteria Analysis of Benchmark Results With Expert Support for Security Tools. IEEE Trans. Dependable Secur. Comput. 19 (4) (2022)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Improving Robustness-Aware Design Space Exploration for FPGA-Based Systems. EDCC (2020)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Robustness-Aware Design Space Exploration Through Iterative Refinement of D-Optimal Designs. EDCC (2019)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Simulating the effects of logic faults in implementation-level VITAL-compliant models. Computing 101 (2) (2019)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Speeding-Up Robustness Assessment of HDL Models through Profiling and Multi-Level Fault Injection. LADC (2018)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Tuning synthesis flags to optimize implementation goals: Performance and robustness of the LEON3 processor as a case study. J. Parallel Distributed Comput. 112 (2018)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
DAVOS: EDA Toolkit for Dependability Assessment, Verification, Optimisation and Selection of Hardware Models. DSN (2018)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Accurate Robustness Assessment of HDL Models Through Iterative Statistical Fault Injection. EDCC (2018)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Dependability-Aware Design Space Exploration for Optimal Synthesis Parameters Tuning. DSN (2017)
Ilya Tuzov, Juan Carlos Ruiz, David de Andrés
Accurately Simulating the Effects of Faults in VHDL Models Described at the Implementation-Level. EDCC (2017)
Ilya Tuzov, Juan Carlos Ruiz, David de Andrés, Pedro J. Gil
Speeding-Up Simulation-Based Fault Injection of Complex HDL Models. LADC (2016)
Luis J. Saiz-Adalid, Pedro J. Gil, Juan Carlos Ruiz, Joaquin Gracia-Moran, Daniel Gil-Tomas, Juan-Carlos Baraza-Calvo
Ultrafast Error Correction Codes for Double Error Detection/Correction. EDCC (2016)
Miquel Martínez, David de Andrés, Juan Carlos Ruiz, Jesus Friginal
Analysis of results in dependability benchmarking: Can we do better? M&N (2013)
Hector Marco-Gisbert, Juan Carlos Ruiz, David de Andrés, Ismael Ripoll
Preventing Memory Errors in Networked Vehicle Services Through Diversification. CARS@SAFECOMP (2013)
Antonio Bustos, Jesús Friginal, David de Andrés, Juan Carlos Ruiz
An aspect-oriented approach to face neighbour saturation issues in proactive ad hoc routing protocols: olsrd as a case study. ARMOR (2012)
Miquel Martínez, David de Andrés, Juan Carlos Ruiz, Mahbub Hassan, Salil S. Kanhere
Towards changing the user perception of mobile communications through geotagged information. ARMOR (2012)
Jaime Espinosa, David de Andrés, Juan Carlos Ruiz, Pedro J. Gil
Tolerating multiple faults with proximate manifestations in FPGA-based critical designs for harsh environments. FPL (2012)
Juan Carlos Ruiz, Luis Rincón
An algorithm based on Wang-Landau sampling for finding the global minimum of atomic clusters. J. Comput. Methods Sci. Eng. 9 (4-6) (2009)
Juan Pardo, David de Andrés, Juan Carlos Ruiz, José Carlos Campelo
Technologies for the Development of Dependable and Secure Component-based Embedded Systems: TecnoSeC Project. ESA (2009)