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Tuning synthesis flags to optimize implementation goals: Performance and robustness of the LEON3 processor as a case study.
Ilya Tuzov
David de Andrés
Juan Carlos Ruiz
Published in:
J. Parallel Distributed Comput. (2018)
Keyphrases
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case study
highly parallel
instruction set
program synthesis
hardware architectures
test bed
high end
cell broadband engine architecture
real time
control system
high speed
computational efficiency
efficient implementation
graphics processing units
parallel architectures