David de Andrés

Publication Activity (10 Years)

Years Active: 2000-2024
Publications (10 Years): 15

Top Topics

Design Space Exploration

Analytical Hierarchy Process

Instruction Set

Fault Injection

Top Venues

Comput. Networks

Publications

Juan Carlos Ruiz, David de Andrés, Luis J. Saiz-Adalid, Joaquin Gracia-Moran
Zero-Space In-Weight and In-Bias Protection for Floating-Point-based CNNs. EDCC (2024)
Ilya Tuzov, David de Andrés, Juan-Carlos Ruiz-Garcia, Carles Hernández
BAFFI: a bit-accurate fault injector for improved dependability assessment of FPGA prototypes. DATE (2023)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Reversing FPGA architectures for speeding up fault injection: does it pay? EDCC (2022)
Miquel Martínez, Juan Carlos Ruiz, Nuno Antunes, David de Andrés, Marco Vieira
A Multi-Criteria Analysis of Benchmark Results With Expert Support for Security Tools. IEEE Trans. Dependable Secur. Comput. 19 (4) (2022)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Improving Robustness-Aware Design Space Exploration for FPGA-Based Systems. EDCC (2020)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Robustness-Aware Design Space Exploration Through Iterative Refinement of D-Optimal Designs. EDCC (2019)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Simulating the effects of logic faults in implementation-level VITAL-compliant models. Computing 101 (2) (2019)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Speeding-Up Robustness Assessment of HDL Models through Profiling and Multi-Level Fault Injection. LADC (2018)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Tuning synthesis flags to optimize implementation goals: Performance and robustness of the LEON3 processor as a case study. J. Parallel Distributed Comput. 112 (2018)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
DAVOS: EDA Toolkit for Dependability Assessment, Verification, Optimisation and Selection of Hardware Models. DSN (2018)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Accurate Robustness Assessment of HDL Models Through Iterative Statistical Fault Injection. EDCC (2018)
Ilya Tuzov, David de Andrés, Juan Carlos Ruiz
Dependability-Aware Design Space Exploration for Optimal Synthesis Parameters Tuning. DSN (2017)
Ilya Tuzov, Juan Carlos Ruiz, David de Andrés
Accurately Simulating the Effects of Faults in VHDL Models Described at the Implementation-Level. EDCC (2017)
Ilya Tuzov, Juan Carlos Ruiz, David de Andrés, Pedro J. Gil
Speeding-Up Simulation-Based Fault Injection of Complex HDL Models. LADC (2016)
Jesus Friginal, Miquel Martínez, David de Andrés, Juan-Carlos Ruiz-Garcia
Multi-criteria analysis of measures in benchmarking: Dependability benchmarking as a case study. J. Syst. Softw. 111 (2016)
Jaime Espinosa, Carles Hernández, Jaume Abella, David de Andrés, Juan-Carlos Ruiz-Garcia
Analysis and RTL correlation of instruction set simulators for automotive microcontroller robustness verification. DAC (2015)
Jaime Espinosa, David de Andrés, Pedro J. Gil
Increasing the Dependability of VLSI Systems through Early Detection of Fugacious Faults. EDCC (2015)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Miquel Martínez
REFRAHN: A Resilience Evaluation Framework for Ad Hoc Routing Protocols. Comput. Networks 82 (2015)
Jesus Friginal, Juan-Carlos Ruiz-Garcia, David de Andrés, Antonio Bustos
Ambient noise in wireless mesh networks: Evaluation and proposal of an adaptive algorithm to mitigate link removal. J. Netw. Comput. Appl. 41 (2014)
Miquel Martínez, David de Andrés, Juan-Carlos Ruiz-Garcia
Gaining Confidence on Dependability Benchmarks' Conclusions through "Back-to-Back" Testing (Practical Experience Report). EDCC (2014)
Miquel Martínez, David de Andrés, Juan-Carlos Ruiz-Garcia, Jesus Friginal
From Measures to Conclusions Using Analytic Hierarchy Process in Dependability Benchmarking. IEEE Trans. Instrum. Meas. 63 (11) (2014)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Miquel Martínez
A survey of evaluation platforms for ad hoc routing protocols: A resilience perspective. Comput. Networks 75 (2014)
Joaquin Gracia-Moran, Juan-Carlos Ruiz-Garcia, Juan-Carlos Baraza-Calvo, David de Andrés, Pedro J. Gil
Improving the Transfer of Safety and Security Competences to Industry: The RISKY Approach. EWDC (2013)
Miquel Martínez, David de Andrés, Juan Carlos Ruiz, Jesus Friginal
Analysis of results in dependability benchmarking: Can we do better? M&N (2013)
J. M. Montanana, David de Andrés, F. Tirado
Fault Tolerance on NoCs. AINA Workshops (2013)
Hector Marco-Gisbert, Juan Carlos Ruiz, David de Andrés, Ismael Ripoll
Preventing Memory Errors in Networked Vehicle Services Through Diversification. CARS@SAFECOMP (2013)
Jaime Espinosa, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
The Challenge of Detection and Diagnosis of Fugacious Hardware Faults in VLSI Designs. EWDC (2013)
Miquel Martínez, Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia
Open Challenges in the Resilience Evaluation of Ad Hoc Networks. EWDC (2013)
Jesus Friginal, Juan-Carlos Ruiz-Garcia, David de Andrés, Antonio Bustos
Mitigating the impact of ambient noise on Wireless Mesh Networks using adaptive link-quality-based packet replication. DSN (2012)
Antonio Bustos, Jesús Friginal, David de Andrés, Juan Carlos Ruiz
An aspect-oriented approach to face neighbour saturation issues in proactive ad hoc routing protocols: olsrd as a case study. ARMOR (2012)
Miquel Martínez, David de Andrés, Juan Carlos Ruiz, Mahbub Hassan, Salil S. Kanhere
Towards changing the user perception of mobile communications through geotagged information. ARMOR (2012)
Jaime Espinosa, David de Andrés, Juan Carlos Ruiz, Pedro J. Gil
Tolerating multiple faults with proximate manifestations in FPGA-based critical designs for harsh environments. FPL (2012)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
Using Performance, Energy Consumption, and Resilience Experimental Measures to Evaluate Routing Protocols for Ad Hoc Networks. NCA (2011)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Regina Moraes
Using Dependability Benchmarks to Support ISO/IEC SQuaRE. PRDC (2011)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
Coarse-grained resilience benchmarking using logic score of preferences: ad hoc networks as a case study. EWDC (2011)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
Resilience-Driven Parameterisation of Ad Hoc Routing Protocols: olsrd as a Case Study. SRDS (2011)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
On Selecting Representative Faultloads to Guide the Evaluation of Ad Hoc Networks. LADC (2011)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
Towards benchmarking routing protocols in wireless mesh networks. Ad Hoc Networks 9 (8) (2011)
Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
Attack Injection to Support the Evaluation of Ad Hoc Networks. SRDS (2010)
David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
Using Dependability, Performance, Area and Energy Consumption Experimental Measures to Benchmark IP Cores. LADC (2009)
Juan-Carlos Ruiz-Garcia, David de Andrés, Pedro J. Gil
Design and Deployment of a Generic ECC-based Fault Tolerance Mechanism for Embedded HW Cores. ETFA (2009)
David de Andrés, Jesus Friginal, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
An Attack Injection Approach to Evaluate the Robustness of Ad Hoc Networks. PRDC (2009)
Juan Pardo, David de Andrés, Juan Carlos Ruiz, José Carlos Campelo
Technologies for the Development of Dependable and Secure Component-based Embedded Systems: TecnoSeC Project. ESA (2009)
Juan-Carlos Ruiz-Garcia, David de Andrés, Sara Blanc, Pedro J. Gil
Generic Design and Automatic Deployment of NMR Strategies on HW Cores. PRDC (2008)
David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
Fault Emulation for Dependability Evaluation of VLSI Systems. IEEE Trans. Very Large Scale Integr. Syst. 16 (4) (2008)
David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
Dependability Assessment for the Selection of Embedded Cores. EDCC (2008)
David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
Run-Time Reconfiguration for Emulating Transient Faults in VLSI Systems. DSN (2006)
David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
Fast Emulation of Permanent Faults in VLSI Systems. FPL (2006)
David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
FADES: a fault emulation tool for fast dependability assessment. FPT (2006)
David de Andrés, José Albaladejo, Lenin Lemus, Pedro J. Gil
Fast Run-Time Reconfiguration for SEU Injection. EDCC (2005)
José Albaladejo, David de Andrés, Lenin Lemus, Joaquim Salvi
Codesign methodology for computer vision applications. Microprocess. Microsystems 28 (5-6) (2004)
Pedro Yuste, David de Andrés, Lenin Lemus, Juan José Serrano, Pedro J. Gil
INERTE: Integrated NExus-Based Real-Time Fault Injection Tool for Embedded Systems. DSN (2003)
Lenin Lemus, David de Andrés, Pedro J. Gil
An alternative to unify performance and reliability analysis of industrial applications. ESM (2000)