Login / Signup

Using Interleaving to Avoid the Effects of Multiple Adjacent Faults in On-Chip Interconnection Lines.

Luis J. Saiz-AdalidPedro J. GilJoaquin Gracia-MoranJuan-Carlos Baraza-Calvo
Published in: EWDC (2013)
Keyphrases
  • artificial intelligence
  • real time
  • image processing
  • database systems
  • high speed
  • hough transform
  • straight line
  • model based diagnosis
  • high density
  • vlsi implementation