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Oana Boncalo
ORCID
Publication Activity (10 Years)
Years Active: 2007-2023
Publications (10 Years): 23
Top Topics
Floating Point
Ldpc Codes
Layered Architecture
Finite Alphabet
Top Venues
DSD
MIXDES
SACI
IEEE Trans. Circuits Syst. I Regul. Pap.
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Publications
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Oana Boncalo
,
Alexandru Amaricai
Gradient Descent Iterative Correction Unit for Fixed Point Parity Based Codes.
DFT
(2023)
Marian-Emanuel Ionascu
,
Núria Castell
,
Oana Boncalo
,
Philipp Schneider
,
Marius Darie
,
Marius Marcu
Calibration of CO, NO2, and O3 Using Airify: A Low-Cost Sensor Cluster for Air Quality Monitoring.
Sensors
21 (23) (2021)
Oana Boncalo
,
Alexandru Amaricai
Layered LDPC decoder in-order message access scheduling: a case study.
SACI
(2020)
Oana Boncalo
,
Gyorgy Kolumban-Antal
,
Alexandru Amaricai
,
Valentin Savin
,
David Declercq
Layered LDPC Decoders With Efficient Memory Access Scheduling and Mapping and Built-In Support for Pipeline Hazards Mitigation.
IEEE Trans. Circuits Syst. I Regul. Pap.
(4) (2019)
Oana Boncalo
,
Alexandru Amaricai
,
Zsófia Lendek
Configurable Hardware Accelerator Architecture for a Takagi-Sugeno Fuzzy Controller.
DSD
(2019)
Khoa Le
,
Fakhreddine Ghaffari
,
Lounis Kessal
,
David Declercq
,
Valentin Savin
,
Oana Boncalo
Lightweight Hardware Architecture for Probabilistic Gradient Descent Bit Flipping on QC-LDPC Codes.
ISCAS
(2018)
David Declercq
,
Valentin Savin
,
Oana Boncalo
,
Fakhreddine Ghaffari
An Imprecise Stopping Criterion Based on In-Between Layers Partial Syndromes.
IEEE Commun. Lett.
22 (1) (2018)
Thien Truong Nguyen-Ly
,
Valentin Savin
,
Khoa Le
,
David Declercq
,
Fakhreddine Ghaffari
,
Oana Boncalo
Analysis and Design of Cost-Effective, High-Throughput LDPC Decoders.
IEEE Trans. Very Large Scale Integr. Syst.
26 (3) (2018)
Oana Boncalo
,
Alexandru Amaricai
,
Sergiu Nimara
Memory-Centric Flooded LDPC Decoder Architecture Using Non-surjective Finite Alphabet Iterative Decoding.
DSD
(2018)
Khoa Le
,
David Declercq
,
Fakhreddine Ghaffari
,
Lounis Kessal
,
Oana Boncalo
,
Valentin Savin
Variable-Node-Shift Based Architecture for Probabilistic Gradient Descent Bit Flipping on QC-LDPC Codes.
IEEE Trans. Circuits Syst. I Regul. Pap.
(7) (2018)
Oana Boncalo
,
Gyorgy Kolumban-Antal
,
David Declercq
,
Valentin Savin
Code-design for efficient pipelined layered LDPC decoders with bank memory organization.
Microprocess. Microsystems
63 (2018)
Oana Boncalo
,
Valentin Savin
,
Alexandru Amaricai
Unrolled layered architectures for non-surjective finite alphabet iterative decoders.
NORCAS
(2017)
Alexandru Amaricai
,
Ovidiu Sicoe
,
Oana Boncalo
On the Redundant Representation of Partial Remainders in Radix-4 SRT Dividers.
J. Circuits Syst. Comput.
26 (6) (2017)
Thien Truong Nguyen-Ly
,
Valentin Savin
,
Khoa Le
,
David Declercq
,
Fakhreddine Ghaffari
,
Oana Boncalo
Analysis and Design of Cost-Effective, High-Throughput LDPC Decoders.
CoRR
(2017)
Oana Boncalo
,
Alexandru Amaricai
Ultra High Throughput Unrolled Layered Architecture for QC-LDPC Decoders.
ISVLSI
(2017)
Oana Boncalo
QC-LDPC Gear-Like Decoder Architecture with Multi-domain Quantization.
DSD
(2016)
Sergiu Nimara
,
Oana Boncalo
,
Alexandru Amaricai
,
Mircea Popa
FPGA architecture of multi-codeword LDPC decoder with efficient BRAM utilization.
DDECS
(2016)
Alexandru Amaricai
,
Sergiu Nimara
,
Oana Boncalo
,
Emanuel M. Popovici
Reliability analysis of memory centric LDPC decoders under probabilistic storage failures.
ICECS
(2016)
Marius Marcu
,
Oana Boncalo
,
Madalin Ghenea
,
Alexandru Amaricai
,
Jan Weinstock
,
Rainer Leupers
,
Zheng Wang
,
Giorgis Georgakoudis
,
Dimitrios S. Nikolopoulos
,
Cosmin Cernazanu-Glavan
,
Lucian Bara
,
Marian Ionascu
Low-Cost Hardware Infrastructure for Runtime Thread Level Energy Accounting.
ARCS
(2016)
Virgil E. Petcu
,
Oana Boncalo
,
Alexandru Amaricai
,
Valentin Savin
Variable throughput LDPC decoders using SIMD-based adaptive quantization.
TSP
(2016)
Patricia Carla Petrut
,
Alexandru Amaricai
,
Oana Boncalo
Configurable FPGA architecture for hardware-software merge sorting.
MIXDES
(2016)
Thien Truong Nguyen-Ly
,
Khoa Le
,
Valentin Savin
,
David Declercq
,
Fakhreddine Ghaffari
,
Oana Boncalo
Non-surjective finite alphabet iterative decoders.
ICC
(2016)
Oana Boncalo
,
Ioana Mot
Multi Clock Flooded LDPC Decoding Architecture with Reduced Memory and Interconnect.
ISVLSI
(2016)
Ioana Mot
,
Oana Boncalo
,
Alexandru Amaricai
Performance Enhancement of Serial Based FPGA Probabilistic Fault Emulation Techniques.
DDECS
(2015)
Truong Nguyen-Ly
,
Khoa Le
,
Fakhreddine Ghaffari
,
Alexandru Amaricai
,
Oana Boncalo
,
Valentin Savin
,
David Declercq
FPGA design of high throughput LDPC decoder based on imprecise Offset Min-Sum decoding.
NEWCAS
(2015)
Andrei Hera
,
Oana Boncalo
,
Constantina-Elena Gavriliu
,
Alexandru Amaricai
,
Valentin Savin
,
David Declercq
,
Fakhreddine Ghaffari
Analysis and implementation of on-the-fly stopping criteria for layered QC LDPC decoders.
MIXDES
(2015)
Lucian Bara
,
Oana Boncalo
,
Marius Marcu
Hardware support for performance measurements and energy estimation of OpenRISC processor.
SACI
(2015)
Oana Boncalo
,
Petru Florin Mihancea
,
Alexandru Amaricai
Template-based QC-LDPC decoder architecture generation.
ICICS
(2015)
Oana Boncalo
,
Alexandru Amaricai
,
Valentin Savin
Memory efficient implementation of self-corrected min-sum LDPC decoder.
ICECS
(2014)
Oana Boncalo
,
Alexandru Amaricai
,
Christian Spagnol
,
Emanuel M. Popovici
Cost effective FPGA probabilistic fault emulation.
NORCHIP
(2014)
Alexandru Amaricai
,
Oana Boncalo
,
Constantina-Elena Gavriliu
Low-precision DSP-based floating-point multiply-add fused for field programmable gate arrays.
IET Comput. Digit. Tech.
8 (4) (2014)
Alexandru Amaricai
,
Constantina-Elena Gavriliu
,
Oana Boncalo
An FPGA sliding window-based architecture harris corner detector.
FPL
(2014)
Alexandru Amaricai
,
Sergiu Nimara
,
Oana Boncalo
,
Jiaoyan Chen
,
Emanuel M. Popovici
Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits.
DSD
(2014)
Oana Boncalo
,
Alexandru Amaricai
,
Andrei Hera
,
Valentin Savin
Cost-efficient FPGA layered LDPC decoder with serial AP-LLR processing.
FPL
(2014)
Alexandru Amaricai
,
Oana Boncalo
SRT radix-2 dividers with (5, 4) redundant representation of partial remainder.
NORCHIP
(2013)
Alexandru Amaricai
,
Oana Boncalo
,
Ovidiu Sicoe
,
Marius Marcu
FPGA implementation of hybrid fixed point - Floating point multiplication.
MIXDES
(2013)
Alexandru Amaricai
,
Oana Boncalo
Automatic Generation of FPGA Hardware Accelerators for Graphics Applications.
PECCS
(2012)
Alexandru Amaricai
,
Oana Boncalo
FPGA implementation of very high radix square root with prescaling.
ICECS
(2012)
Oana Boncalo
,
Alin Dobre
,
Alexandru Amaricai
,
Andrei V. Tanase
A cycle-count-accurate simulation platform with enhanced design exploration capability.
SimuTools
(2012)
Alexandru Amaricai
,
Alin Dobre
,
Oana Boncalo
,
Andrei V. Tanase
,
Camelia Valuch
Models and implementations of hardware interface modules in a multi-processor system-on-chip simulator.
SACI
(2011)
Alexandru Amaricai
,
Mircea Vladutiu
,
Oana Boncalo
Design Issues and Implementations for Floating-Point Divide-Add Fused.
IEEE Trans. Circuits Syst. II Express Briefs
(4) (2010)
Oana Boncalo
,
Alexandru Amaricai
,
Mihai Udrescu
,
Mircea Vladutiu
Quantum circuit's reliability assessment with VHDL-based simulated fault injection.
Microelectron. Reliab.
50 (2) (2010)
Oana Boncalo
,
Alexandru Amaricai
Reliability Analysis of Qubit Data Movement for Distributed Quantum Computation.
DSD
(2009)
Alexandru Amaricai
,
Oana Boncalo
Improving the Performance of the Divide-Add Fused Operation Using Variable Latency Quotient Generation.
DSD
(2009)
Alexandru Amaricai
,
Mircea Vladutiu
,
Mihai Udrescu
,
Lucian Prodan
,
Oana Boncalo
Floating point multiplication rounding schemes for interval arithmetic.
ASAP
(2008)
Oana Boncalo
,
Mihai Udrescu
,
Lucian Prodan
,
Mircea Vladutiu
,
Alexandru Amaricai
Assessing quantum circuits reliability with mutant-based simulated fault injection.
ECCTD
(2007)
Oana Boncalo
,
Mihai Udrescu
,
Lucian Prodan
,
Mircea Vladutiu
,
Alexandru Amaricai
Using Simulated Fault Injection for Fault Tolerance Assessment of Quantum Circuits.
Annual Simulation Symposium
(2007)
Alexandru Amaricai
,
Mircea Vladutiu
,
Lucian Prodan
,
Mihai Udrescu
,
Oana Boncalo
Exploiting Parallelism in Double Path Adders' Structure for Increased Throughput of Floating Point Addition.
DSD
(2007)
Oana Boncalo
,
Mihai Udrescu
,
Lucian Prodan
,
Mircea Vladutiu
,
Alexandru Amaricai
Simulated Fault Injection for Quantum Circuits Based on Simulator Commands.
SACI
(2007)
Alexandru Amaricai
,
Mircea Vladutiu
,
Lucian Prodan
,
Mihai Udrescu
,
Oana Boncalo
Design of Addition and Multiplication Units for High Performance Interval Arithmetic Processor.
DDECS
(2007)
Lucian Prodan
,
Mihai Udrescu
,
Oana Boncalo
,
Mircea Vladutiu
Design for dependability in emerging technologies.
ACM J. Emerg. Technol. Comput. Syst.
3 (2) (2007)
Oana Boncalo
,
Mihai Udrescu
,
Lucian Prodan
,
Mircea Vladutiu
,
Alexandru Amaricai
Saboteur-Based Fault Injection for Quantum Circuits Fault Tolerance Assessment.
DSD
(2007)