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Exploiting Parallelism in Double Path Adders' Structure for Increased Throughput of Floating Point Addition.

Alexandru AmaricaiMircea VladutiuLucian ProdanMihai UdrescuOana Boncalo
Published in: DSD (2007)
Keyphrases
  • floating point
  • fixed point
  • square root
  • memory bandwidth
  • sparse matrices
  • reinforcement learning
  • parallel processing
  • parallel computation
  • programmable logic
  • interval arithmetic
  • floating point arithmetic