Low-precision DSP-based floating-point multiply-add fused for field programmable gate arrays.
Alexandru AmaricaiOana BoncaloConstantina-Elena GavriliuPublished in: IET Comput. Digit. Tech. (2014)
Keyphrases
- floating point
- digital signal processing
- field programmable gate array
- digital signal processors
- signal processing
- hardware implementation
- data flow
- fixed point
- embedded systems
- hardware design
- low power
- image processing algorithms
- image processing
- computer vision and image processing
- parallel computing
- programmable logic
- instruction set
- massively parallel
- graphics processing units
- fpga technology
- computer vision
- pattern recognition
- floating point arithmetic
- efficient implementation
- software systems
- data streams
- hw sw
- hardware software co design
- real time
- application specific integrated circuits