Nitin Chandrachoodan

Publication Activity (10 Years)

Years Active: 1999-2023
Publications (10 Years): 30

Top Topics

Traffic Analysis

Power Reduction

Fpga Implementation

Top Venues

IET Comput. Digit. Tech.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Shashank Nag, Gourav Datta, Souvik Kundu, Nitin Chandrachoodan, Peter A. Beerel
ViTA: A Vision Transformer Inference Accelerator for Edge Applications. CoRR (2023)
Shashank Nag, Gourav Datta, Souvik Kundu, Nitin Chandrachoodan, Peter A. Beerel
ViTA: A Vision Transformer Inference Accelerator for Edge Applications. ISCAS (2023)
Gargi Mitra, Prasanna Karthik Vairam, Sandip Saha, Nitin Chandrachoodan, V. Kamakoti
Snoopy: A Webpage Fingerprinting Framework With Finite Query Model for Mass-Surveillance. IEEE Trans. Dependable Secur. Comput. 20 (5) (2023)
Dara Nagaraju, Nitin Chandrachoodan
Compressing fully connected layers of deep neural networks using permuted features. IET Comput. Digit. Tech. 17 (3-4) (2023)
Dara Nagaraju, Nitin Chandrachoodan
Slimmer CNNs Through Feature Approximation and Kernel Size Reduction. IEEE Open J. Circuits Syst. 4 (2023)
Dara Nagaraju, Nitin Chandrachoodan
Work-in-Progress: QRCNN: Scalable CNNs. CASES (2023)
Abinand Nallathambi, Sanchari Sen, Anand Raghunathan, Nitin Chandrachoodan
Layerwise Disaggregated Evaluation of Spiking Neural Networks. ISLPED (2022)
Pani Prithvi Raj, Akhil Reddy Pakala, Nitin Chandrachoodan
Reduced Memory Viterbi Decoding for Hardware-accelerated Speech Recognition. ACM Trans. Embed. Comput. Syst. 21 (3) (2022)
Arjun Menon Vadakkeveedu, Debabrata Mandal, Pradeep Ramachandran, Nitin Chandrachoodan
Split-Knit Convolution: Enabling Dense Evaluation of Transpose and Dilated Convolutions on GPUs. HIPC (2022)
Gargi Mitra, Prasanna Karthik Vairam, Sandip Saha, Nitin Chandrachoodan, V. Kamakoti
Snoopy: A Webpage Fingerprinting Framework with Finite Query Model for Mass-Surveillance. CoRR (2022)
Celia Dharmaraj, Vinita Vasudevan, Nitin Chandrachoodan
Optimization of Signal Processing Applications Using Parameterized Error Models for Approximate Adders. ACM Trans. Embed. Comput. Syst. 20 (2) (2021)
Basava Naga Girish Koneru, Nitin Chandrachoodan, Vinita Vasudevan
A Smoothed LASSO-Based DNN Sparsification Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (10) (2021)
Celia Dharmaraj, Vinita Vasudevan, Nitin Chandrachoodan
Analysis of power-accuracy trade-off in digital signal processing applications using low-power approximate adders. IET Comput. Digit. Tech. 15 (2) (2021)
Sundarrajan Rangachari, Nitin Chandrachoodan
Energy Reduction in Turbo Decoding through Dynamically Varying Bit-Widths. ISCAS (2020)
Gokulkrishnan Vadakkeveedu, Kamakoti Veezhinathan, Nitin Chandrachoodan, Seetal Potluri
Scalable pseudo-exhaustive methodology for testing and diagnosis in flow-based microfluidic biochips. IET Comput. Digit. Tech. 14 (3) (2020)
Abinand Nallathambi, Nitin Chandrachoodan
Probabilistic spike propagation for FPGA implementation of spiking neural networks. CoRR (2020)
Sathish Panchapakesan, Zhenman Fang, Nitin Chandrachoodan
EASpiNN: Effective Automated Spiking Neural Network Evaluation on FPGA. FCCM (2020)
Gargi Mitra, Prasanna Karthik Vairam, Patanjali SLPSK, Nitin Chandrachoodan, Kamakoti Veezhinathan
Depending on HTTP/2 for Privacy? Good Luck! DSN (2020)
Shivani Bathla, Rahul M. Rao, Nitin Chandrachoodan
A Simulation-Based Metric to Guide Glitch Power Reduction in Digital Circuits. IEEE Trans. Very Large Scale Integr. Syst. 27 (2) (2019)
Gargi Mitra, Prasanna Karthik Vairam, Patanjali SLPSK, Nitin Chandrachoodan, Kamakoti Veezhinathan
White Mirror: Leaking Sensitive Information from Interactive Netflix Movies using Encrypted Traffic Analysis. CoRR (2019)
Younghoon Kim, Swagath Venkataramani, Nitin Chandrachoodan, Anand Raghunathan
Data Subsetting: A Data-Centric Approach to Approximate Computing. DATE (2019)
Gargi Mitra, Prasanna Karthik Vairam, Patanjali SLPSK, Nitin Chandrachoodan, Kamakoti Veezhinathan
White Mirror: Leaking Sensitive Information from Interactive Netflix Movies using Encrypted Traffic Analysis. SIGCOMM Posters and Demos (2019)
D. Celia, Vinita Vasudevan, Nitin Chandrachoodan
Optimizing power-accuracy trade-off in approximate adders. DATE (2018)
D. Celia, Vinita Vasudevan, Nitin Chandrachoodan
Probabilistic Error Modeling for Two-part Segmented Approximate Adders. ISCAS (2018)
Karthikeyan Natarajan, Nitin Chandrachoodan
Lossless Parallel Implementation of a Turbo Decoder on GPU. HiPC (2018)
Srinivas Siripurapu, Aman Gayasen, Padmini Gopalakrishnan, Nitin Chandrachoodan
FPGA Implementation of Non-Uniform DFT for Accelerating Wireless Channel Simulations (Abstract Only). FPGA (2017)
Sundarrajan Rangachari, Jaiganesh Balakrishnan, Nitin Chandrachoodan
Scenario-Aware Dynamic Power Reduction Using Bias Addition. IEEE Trans. Very Large Scale Integr. Syst. 25 (2) (2017)
Gokulkrishnan Vadakkeveedu, V. Kamakoti, Nitin Chandrachoodan, Seetal Potluri
A scalable pseudo-exhaustive search for fault diagnosis in microfluidic biochips. DFT (2017)
Amit Salaskar, Nitin Chandrachoodan
FFT/IFFT implementation using Vivado™ HLS. VDAT (2016)
D. Celia, Nitin Chandrachoodan
Guided multilevel approximation of less significant bits for power reduction. VDAT (2016)
Chaitanya Peddawad, Aman Goel, B. Dheeraj, Nitin Chandrachoodan
iitRACE: A Memory Efficient Engine for Fast Incremental Timing Analysis and Clock Pessimism Removal. ICCAD (2015)
Karthikeyan Natarajan, Nitin Chandrachoodan
Non-uniform DFT implementation for channel simulations in GPU. NCC (2015)
Seetal Potluri, Satya Trinadh, Ch. Sobhan Babu, V. Kamakoti, Nitin Chandrachoodan
DFT Assisted Techniques for Peak Launch-to-Capture Power Reduction during Launch-On-Shift At-Speed Testing. ACM Trans. Design Autom. Electr. Syst. 21 (1) (2015)
Vaibhav Pratap Singh, Nitin Chandrachoodan, Anil Prabhakar
Designing a passive star optical network for the India-based Neutrino Observatory. NCC (2015)
Sundarrajan Rangachari, Jaiganesh Balakrishnan, Nitin Chandrachoodan
Scalable Low Power FFT/IFFT Architecture with Dynamic Bit Width Configurability. VLSI Design (2014)
Seetal Potluri, Satya Trinadh, Roopashree Baskaran, Nitin Chandrachoodan, V. Kamakoti
PinPoint: An algorithm for enhancing diagnostic resolution using capture cycle power information. ETS (2013)
Sundarrajan Rangachari, Nitin Chandrachoodan
Scalable low power digital filter architectures for varying input dynamic range. ISCAS (2013)
Shuo Qiao, Anil Prabhakar, Nitin Chandrachoodan, Namita Jacob, Harshvardhan Vathsangam
An inertial sensor-based system to develop motor capacity in children with cerebral palsy. EMBC (2013)
Vimitha A. Kuruvilla, Debjit Sinha, Jeff Piaget, Chandu Visweswariah, Nitin Chandrachoodan
Speeding up computation of the max/min of a set of gaussians for statistical timing analysis and optimization. DAC (2013)
Prabhat Avasare, Nitin Chandrachoodan
Tutorial T1B: Riding the "Energy Consumption Horse" - from System-level Design to Silicon. VLSI Design (2013)
Dhiraj Reddy Nallapa Yoge, Nitin Chandrachoodan
GPU Implementation of a Programmable Turbo Decoder for Software Defined Radio Applications. VLSI Design (2012)
Seetal Potluri, Nitin Chandrachoodan, V. Kamakoti
Interconnect Aware Test Power Reduction. J. Low Power Electron. 8 (4) (2012)
Bharath Kumar Reddy L., Nitin Chandrachoodan
A GPU implementation of belief propagation decoder for polar codes. ACSCC (2012)
Manish Kumar Jaiswal, Nitin Chandrachoodan
FPGA-Based High-Performance and Scalable Block LU Decomposition Architecture. IEEE Trans. Computers 61 (1) (2012)
Nitin Chandrachoodan, Shankar Balachandran
24th "IEEE International Conference on VLSI Design" Chennai, India, 2-7 January 2011. J. Low Power Electron. 7 (4) (2011)
Seetal Potluri, Nitin Chandrachoodan, V. Kamakoti
Post-Synthesis Circuit Techniques for Runtime Leakage Reduction. ISVLSI (2011)
Manish Kumar Jaiswal, Nitin Chandrachoodan
Efficient Implementation of Floating-Point Reciprocator on FPGA. VLSI Design (2009)
Aman Kokrady, C. P. Ravikumar, Nitin Chandrachoodan
Memory Yield Improvement through Multiple Test Sequences and Application-Aware Fault Models. VLSI Design (2008)
Manish Kumar Jaiswal, Nitin Chandrachoodan
Efficient Implementation of IEEE Double Precision Floating-Point Multiplier on FPGA. ICIIS (2008)
Kannan Gaddam, Nitin Chandrachoodan, S. Srinivasan
Rapid Abstract Control Model for Signal Processing Implementation. SiPS (2007)
Karthick Parashar, Nitin Chandrachoodan
A Novel Event Based Simulation Algorithm for Sequential Digital Circuit Simulation. FPL (2007)
Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu
The hierarchical timing pair model for multirate DSP applications. IEEE Trans. Signal Process. 52 (5) (2004)
Arun Raghupathy, Nitin Chandrachoodan, K. J. Ray Liu
Algorithm and VLSI architecture for high performance adaptive video scaling. IEEE Trans. Multim. 5 (4) (2003)
Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu
High-Level Synthesis of DSP Applications Using Adaptive Negative Cycle Detection. EURASIP J. Adv. Signal Process. 2002 (9) (2002)
Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu
An efficient timing model for hardware implementation of multirate dataflow graphs. ICASSP (2001)
Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu
Adaptive negative cycle detection in dynamic graphs. ISCAS (5) (2001)
Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu
The hierarchical timing pair model. ISCAS (5) (2001)
Arun Raghupathy, Pohsiang Hsu, K. J. Ray Liu, Nitin Chandrachoodan
VLSI architecture and design for high performance adaptive video scaling. ISCAS (4) (1999)