Efficient Implementation of Floating-Point Reciprocator on FPGA.

Manish Kumar Jaiswal Nitin Chandrachoodan

Published in: VLSI Design (2009)

Keyphrases

efficient implementation
floating point
hardware implementation
field programmable gate array
square root
fixed point
active set
highly parallel
floating point arithmetic
hardware architecture
instruction set
efficient processing
sparse matrices
low cost
interval arithmetic
signal processing
software systems