Luca Breveglieri

Publication Activity (10 Years)

Years Active: 1988-2023
Publications (10 Years): 12

Top Topics

Information Leakage

Regular Expressions

Reverse Engineer

Top Venues

J. Comput. Lang.

Acta Informatica

Publications

Angelo Borsotti, Luca Breveglieri, Stefano Crespi-Reghizzi, Angelo Morzenti
General parsing with regular expression matching. J. Comput. Lang. 74 (2023)
Angelo Borsotti, Luca Breveglieri, Stefano Crespi-Reghizzi, Angelo Morzenti
A deterministic parsing algorithm for ambiguous regular expressions. Acta Informatica 58 (3) (2021)
Alessandro Barenghi, Luca Breveglieri, Niccolò Izzo, Gerardo Pelosi
Exploring Cortex-M Microarchitectural Side Channel Information Leakage. IEEE Access 9 (2021)
Angelo Borsotti, Luca Breveglieri, Stefano Crespi-Reghizzi, Angelo Morzenti
Fast GLR parsers for extended BNF grammars and transition networks. J. Comput. Lang. 64 (2021)
Angelo Borsotti, Luca Breveglieri, Stefano Crespi-Reghizzi, Angelo Morzenti
A Generalized LR(1) Parser or Extended Context-Free Grammars. ICTCS (2020)
Niccolò Izzo, Alessandro Barenghi, Luca Breveglieri, Gerardo Pelosi, Paolo Amato
A secure and authenticated host-to-memory communication interface. CF (2019)
Angelo Borsotti, Luca Breveglieri, Stefano Crespi-Reghizzi, Angelo Morzenti
A Benchmark Production Tool for Regular Expressions. CIAA (2019)
Angelo Borsotti, Luca Breveglieri, Stefano Crespi-Reghizzi, Angelo Morzenti
Fast deterministic parsers for transition networks. Acta Informatica 55 (7) (2018)
Alessandro Barenghi, Luca Breveglieri, Niccolò Izzo, Gerardo Pelosi
Software-only Reverse Engineering of Physical DRAM Mappings for Rowhammer Attacks. IVSW (2018)
Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Gerardo Pelosi, Stefano Sanfilippo, Ruggero Susella
A Fault-Based Secret Key Retrieval Method for ECDSA: Analysis and Countermeasure. ACM J. Emerg. Technol. Comput. Syst. 13 (1) (2016)
Angelo Borsotti, Luca Breveglieri, Stefano Crespi-Reghizzi, Angelo Morzenti
BSP: A Parsing Tool for Ambiguous Regular Expressions. CIAA (2015)
Angelo Borsotti, Luca Breveglieri, Stefano Crespi-Reghizzi, Angelo Morzenti
From Ambiguous Regular Expressions to Deterministic Parsing Automata. CIAA (2015)
Luca Breveglieri, Stefano Crespi-Reghizzi, Angelo Morzenti
Shift-Reduce Parsers for Transition Networks. LATA (2014)
Angelo Borsotti, Luca Breveglieri, Stefano Crespi-Reghizzi, Angelo Morzenti
Complexity of Extended vs. Classic LR Parsers. DCFS (2014)
Luca Breveglieri, Stefano Crespi-Reghizzi, Angelo Morzenti
Parsing methods streamlined. CoRR (2013)
Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Gerardo Pelosi
A fault induction technique based on voltage underfeeding with application to attacks against AES and RSA. J. Syst. Softw. 86 (7) (2013)
Alessandro Barenghi, Luca Breveglieri, Israel Koren, David Naccache
Fault Injection Attacks on Cryptographic Devices: Theory, Practice, and Countermeasures. Proc. IEEE 100 (11) (2012)
Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Gerardo Pelosi, Andrea Palomba
Fault attack to the elliptic curve digital signature algorithm with multiple bit faults. SIN (2011)
Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi
Low Voltage Fault Attacks to AES and RSA on General Purpose Processors. IACR Cryptol. ePrint Arch. 2010 (2010)
Alessandro Barenghi, Guido Marco Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi
Fault attack on AES with single-bit induced faults. IAS (2010)
Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi
Low Voltage Fault Attacks to AES. HOST (2010)
Luca Breveglieri, Stefano Crespi-Reghizzi, Massimiliano Goldwurm
Efficient recognition of trace languages defined by repeat-until loops. Inf. Comput. 208 (8) (2010)
Alessandro Barenghi, Luca Breveglieri, Israel Koren, Gerardo Pelosi, Francesco Regazzoni
Countermeasures against fault attacks on software implemented AES: effectiveness and cost. WESS (2010)
Luca Breveglieri, Alessandra Cherubini, C. Nuccio, Emanuele Rodaro
Alphabetical Satisfiability Problem for Trace Equations. Acta Cybern. 19 (2) (2009)
Guido Marco Bertoni, Luca Breveglieri, Alessandro Cominola, Filippo Melzani, Ruggero Susella
Practical Power Analysis Attacks to RSA on a Large IP Portfolio SoC. ITNG (2009)
Luca Breveglieri, Alessandra Cherubini, Claudia Di Nucci, Emanuele Rodaro
NP-completeness of the alphabetical satisfiability problem for trace equations. AFL (2008)
Guido Bertoni, Luca Breveglieri, Liqun Chen, Pasqualina Fragneto, Keith A. Harrison, Gerardo Pelosi
A pairing SW implementation for Smart-Cards. J. Syst. Softw. 81 (7) (2008)
Francesco Regazzoni, Thomas Eisenbarth, Luca Breveglieri, Paolo Ienne, Israel Koren
Can Knowledge Regarding the Presence of Countermeasures Against Fault Attacks Simplify Power Attacks on Cryptographic Devices?. DFT (2008)
Guido Marco Bertoni, Luca Breveglieri, Roberto Farina, Francesco Regazzoni
A 640 Mbit/S 32-Bit Pipelined Implementation of the AES Algorithm. SECRYPT (2008)
Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Gerardo Pelosi
A FPGA Coprocessor for the Cryptographic Tate Pairing over Fp. ITNG (2008)
Guido Marco Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi
Parallel Hardware Architectures for the Cryptographic Tate Pairing. Int. J. Netw. Secur. 7 (1) (2008)
Luca Breveglieri, Israel Koren, Paolo Maistri
An Operation-Centered Approach to Fault Detection in Symmetric Cryptography Ciphers. IEEE Trans. Computers 56 (5) (2007)
Giovanni Agosta, Luca Breveglieri, Gerardo Pelosi, Martino Sykora
Programming Highly Parallel Reconfigurable Architectures for Symmetric and Asymmetric Cryptographic Applications. J. Comput. 2 (9) (2007)
Giovanni Agosta, Luca Breveglieri, Gerardo Pelosi, Martino Sykora
Programming Highly Parallel Reconfigurable Architectures for Public-Key Cryptographic Applications. ITNG (2007)
Francesco Regazzoni, Thomas Eisenbarth, Johann Großschädl, Luca Breveglieri, Paolo Ienne, Israel Koren, Christof Paar
Power Attacks Resistance of Cryptographic S-Boxes with Added Error Detection Circuits. DFT (2007)
Giovanni Agosta, Luca Breveglieri, Gerardo Pelosi, Israel Koren
Countermeasures against Branch Target Buffer Attacks. FDTC (2007)
Guido Bertoni, Luca Breveglieri, Matteo Venturi
Power Aware Design of an Elliptic Curve Coprocessor for 8 bit Platforms. PerCom Workshops (2006)
Guido Bertoni, Luca Breveglieri, Matteo Venturi
ECC Hardware Coprocessors for 8-bit Systems and Power Consumption Considerations. ITNG (2006)
Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi
Parallel Hardware Architectures for the Cryptographic Tate Pairing. ITNG (2006)
Luca Breveglieri, Israel Koren, Paolo Maistri
A Fault Attack Against the FOX Cipher Family. FDTC (2006)
Luca Breveglieri, Israel Koren
Guest Editors' Introduction: Special Section on Fault Diagnosis and Tolerance in Cryptography. IEEE Trans. Computers 55 (9) (2006)
Luca Breveglieri, Paolo Maistri, Israel Koren
A Note on Error Detection in an RSA Architecture by Means of Residue Codes. IOLTS (2006)
Thomas J. Wollinger, Guido Bertoni, Luca Breveglieri, Christof Paar
Performance of HECC Coprocessors Using Inversion-Free Formulae. ICCSA (3) (2006)
Guido Bertoni, Luca Breveglieri, Roberto Farina, Francesco Regazzoni
Speeding Up AES By Extending a 32 bit Processor Instruction Set. ASAP (2006)
Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi, Luigi Sportiello
). DATE Designers' Forum (2006)
Luca Breveglieri, Israel Koren, Paolo Maistri, M. Ravasio
Incorporating Error Detection in an RSA Architecture. FDTC (2006)
Fabio Sozzani, Guido Bertoni, Stefano Turcato, Luca Breveglieri
A Parallelized Design for an Elliptic Curve Cryptosystem Coprocessor. ITCC (1) (2005)
Marco Macchetti, Mario Caironi, Luca Breveglieri, Alessandra Cherubini
A Complete Formulation of Generalized Affine Equivalence. ICTCS (2005)
Régis Leveugle, Yervant Zorian, Luca Breveglieri, André K. Nieuwland, Klaus Rothbart, Jean-Pierre Seifert
On-Line Testing for Secure Implementations: Design and Validation. IOLTS (2005)
Luca Breveglieri, Israel Koren, Paolo Maistri
Incorporating Error Detection and Online Reconfiguration into a Regular Architecture for the Advanced Encryption Standard. DFT (2005)
Guido Bertoni, Vittorio Zaccaria, Luca Breveglieri, Matteo Monchiero, Gianluca Palermo
AES Power Attack Based on Induced Cache Miss and Countermeasure. ITCC (1) (2005)
Guido Bertoni, Luca Breveglieri, Thomas J. Wollinger, Christof Paar
Finding Optimum Parallel Coprocessor Design for Genus 2 Hyperelliptic Curve Cryptosystems. IACR Cryptol. ePrint Arch. 2004 (2004)
Kubilay Atasu, Luca Breveglieri, Marco Macchetti
Efficient AES implementations for ARM based platforms. SAC (2004)
Guido Bertoni, Luca Breveglieri, Thomas J. Wollinger, Christof Paar
Finding Optimum Parallel Coprocessor Design for Genus 2 Hyperelliptic Curve Cryptosystems. ITCC (2) (2004)
Luca Breveglieri, Israel Koren, Paolo Maistri
Detecting Faults in Four Symmetric Key Block Ciphers. ASAP (2004)
Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri
An Efficient Hardware-Based Fault Diagnosis Scheme for AES: Performances and Cost. DFT (2004)
Luca Breveglieri, Israel Koren
Workshop on Fault Diagnosis and Tolerance in Cryptography. DSN (2004)
Luca Breveglieri, Alessandra Cherubini, Marco Macchetti
On the Generalized Linear Equivalence of Functions Over Finite Fields. ASIACRYPT (2004)
Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
Detecting and Locating Faults in VLSI Implementations of the Advanced Encryption Standard. DFT (2003)
Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
Concurrent Fault Detection in a Hardware Implementation of the RC5 Encryption Algorithm. ASAP (2003)
Guido Bertoni, A. Bircan, Luca Breveglieri, Pasqualina Fragneto, Marco Macchetti, Vittorio Zaccaria
About the performances of the Advanced Encryption Standard in embedded systems with cache memory. ISCAS (5) (2003)
Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard. IEEE Trans. Computers 52 (4) (2003)
Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Marco Macchetti, Stefano Marchesin
Efficient Software Implementation of AES on 32-Bit Platforms. CHES (2002)
Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
A Parity Code Based Fault Detection for an Implementation of the Advanced Encryption Standard. DFT (2002)
Luca Breveglieri, Vincenzo Piuri
Digital Median Filters. J. VLSI Signal Process. 31 (3) (2002)
Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
On the Propagation of Faults and Their Detection in a Hardware Implementation of the Advanced Encryption Standard. ASAP (2002)
Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto
Efficient finite field digital-serial multiplier architecture for cryptography applications. DATE (2001)
Anna Antola, Luca Breveglieri
Dedicated Circuits for the Generation of Windows in Image Processing Architectures. J. VLSI Signal Process. 25 (1) (2000)
Luca Breveglieri, Stefano Crespi-Reghizzi, Alessandra Cherubini
Modeling Operating Systems Schedulers with Multi-Stack-Queue Grammars. FCT (1999)
Luca Breveglieri, Luigi Dadda
A VLSI inner product macrocell. IEEE Trans. Very Large Scale Integr. Syst. 6 (2) (1998)
Luca Breveglieri
Fair Expressions and Regular Languages over Lists. RAIRO Theor. Informatics Appl. 31 (1) (1997)
Luca Breveglieri, Luigi Dadda, Vincenzo Piuri
Fast Arithmetic and Fault Tolerance in the FERMI System. ASAP (1997)
Anna Antola, Luca Breveglieri
Balancing of Fault Tolerance in the New Version of the FERMI Channel Chip: a Functional Evaluation. DFT (1996)
Luca Breveglieri, Alessandra Cherubini, Claudio Citrini, Stefano Crespi-Reghizzi
Multi-Push-Down Languages and Grammars. Int. J. Found. Comput. Sci. 7 (3) (1996)
Luca Breveglieri, Alessandra Cherubini, Stefano Crespi-Reghizzi
Deterministic Parsing for Augmented Context-free Grammars. MFCS (1995)
Anna Antola, Luca Breveglieri
A model for the evaluation of fault tolerance in the FERMI system. DFT (1995)
Luca Breveglieri, Luigi Dadda, Vincenzo Piuri
Column Compression Pipelined Multipliers. ASAP (1995)
Luca Breveglieri, Vincenzo Piuri
A fast pipelined FFT unit. ASAP (1994)
Luca Breveglieri, Alessandra Cherubini, Claudio Citrini, Stefano Crespi-Reghizzi
Fair First Languages and Parallel Programme Schemes. Developments in Language Theory (1993)
A. Dell'Acqua, M. Hansen, Sami J. Inkinen, B. Lofstedt, J. P. Vanuxem, Christer Svensson, Jiren Yuan, H. Hentzell, L. Del Buono, J. David, J. F. Genat, H. Lebbolo, O. LeDortz, P. Nayman, Aurore Savoy-Navarro, R. Zitoun, Cesare Alippi, Luca Breveglieri, Luigi Dadda, Vincenzo Piuri, Fabio Salice, Mariagiovanna Sami, Renato Stefanelli, P. Cattaneo, G. Fumagalli, G. Goggi, Simona Brigati, Umberto Gatti, Franco Maloberti, Guido Torelli, P. Carlson, A. Kerek, Goran Appelquist, S. Berglund, C. Bohm, Magnus Engström, N. Yamdagni, Rolf Sundblad, I. Höglund, S. T. Persson
System Level Policies for Fault Tolerance Issues in the FERMI Project. DFT (1993)
Anna Antola, Alberto Avai, Luca Breveglieri, Andrea Paparella
Modular Design Methodologies for Image Processing Architectures. VLSI Design (1993)
Anna Antola, Alberto Avai, Luca Breveglieri
Modular design methodologies for image processing architectures. IEEE Trans. Very Large Scale Integr. Syst. 1 (4) (1993)
Anna Antola, Luca Breveglieri
Window-based dedicated parallel architectures for image processing. ICPR (4) (1992)
Luca Breveglieri, Alessandra Cherubini, Stefano Crespi-Reghizzi
Real-Time Scheduling by Queue Automata. FTRTFT (1992)
Luca Breveglieri, Claudio Citrini, Stefano Crespi-Reghizzi
Deterministic Dequeue Automata and LL(1) Parsing of Breadth-Depth Grammars. FCT (1991)
Luca Breveglieri, Luigi Dadda, Donatella Sciuto
Testing of serial input convolvers. Microprocessing and Microprogramming 28 (1-5) (1990)
Luca Breveglieri
Design and implementation of a VLSI serial multiplier for fixed point numbers with self-checking capability. Microprocess. Microprogramming 24 (1-5) (1988)
Luigi Dadda, Luca Breveglieri
A serial-input serial-output bit-sliced convolver. ICCD (1988)