Krzysztof Kuchcinski

Publication Activity (10 Years)

Years Active: 1987-2019
Publications (10 Years): 2

Top Topics

Design Space Exploration

Constraint Programming

Code Generation

Top Venues

Microprocess. Microsystems

Publications

Krzysztof Kuchcinski
Constraint programming in embedded systems design: Considered helpful. Microprocess. Microsystems 69 (2019)
Mehmet Ali Arslan, Flavius Gruian, Krzysztof Kuchcinski, Andreas Karlsson
Code generation for a SIMD architecture with custom memory organisation. DASIP (2016)
Mehmet Ali Arslan, Krzysztof Kuchcinski, Flavius Gruian, Yangxurui Liu
Programming support for reconfigurable custom vector architectures. PMAM@PPoPP (2015)
Mehmet Ali Arslan, Flavius Gruian, Krzysztof Kuchcinski
Application-set driven exploration for custom processor architectures. ASAP (2015)
Mehmet Ali Arslan, Flavius Gruian, Krzysztof Kuchcinski
A Comparative Study of Scheduling Techniques for Multimedia Applications on SIMD Pipelines. CoRR (2015)
Mehmet Ali Arslan, Krzysztof Kuchcinski
Instruction selection and scheduling for DSP kernels. Microprocess. Microsystems 38 (8) (2014)
Peter Nilsson, Pietro Andreani, Krzysztof Kuchcinski, Joachim Rodrigues, Henrik Sjöland, Markus Törmänen, Lars-Erik Wernersson, Viktor Öwall
Lessons from ten years of the international master's program in System-on-Chip. EWME (2014)
Usman Mazhar Mirza, Flavius Gruian, Krzysztof Kuchcinski
Mapping streaming applications on multiprocessors with time-division-multiplexed network-on-chip. Comput. Electr. Eng. 40 (8) (2014)
Usman Mazhar Mirza, Flavius Gruian, Krzysztof Kuchcinski
Design space exploration for streaming applications on multiprocessors with guaranteed service NoC. NoCArc@MICRO (2013)
Mehmet Ali Arslan, Krzysztof Kuchcinski
Instruction Selection and Scheduling for DSP Kernels on Custom Architectures. DSD (2013)
Kevin J. M. Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot
Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation. ACM Trans. Reconfigurable Technol. Syst. 5 (2) (2012)
Erwan Raffin, Christophe Wolinski, François Charot, Emmanuel Casseau, Antoine Floch, Krzysztof Kuchcinski, Stéphane Chevobbe, Stéphane Guyetant
Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia Architecture. Int. J. Embed. Real Time Commun. Syst. 3 (1) (2012)
Mehmet Ali Arslan, Jörn W. Janneck, Krzysztof Kuchcinski
Partitioning and mapping dynamic dataflow programs. ACSCC (2012)
Björn Regnell, Krzysztof Kuchcinski
Exploring Software Product Management decision problems with constraint solving - opportunities for prioritization and release planning. IWSPM (2011)
Carl Christian Rolf, Krzysztof Kuchcinski
Distributed Constraint Programming with Agents. ICAIS (2011)
Antoine Floch, Christophe Wolinski, Krzysztof Kuchcinski
Combined scheduling and instruction selection for processors with reconfigurable cell fabric. ASAP (2010)
Erwan Raffin, Christophe Wolinski, François Charot, Krzysztof Kuchcinski, Stéphane Guyetant, Stéphane Chevobbe, Emmanuel Casseau
Scheduling, binding and routing system for a run-time reconfigurable operator based multimedia architecture. DASIP (2010)
Carl Christian Rolf, Krzysztof Kuchcinski
Parallel Consistency in Constraint Programming. PDPTA (2009)
Ali R. Iranpour, Krzysztof Kuchcinski
Design space exploration for optimal memory mapping of data and instructions in multimedia applications to Scratch-Pad Memories. ESTIMedia (2009)
Christophe Wolinski, Krzysztof Kuchcinski, Erwan Raffin, François Charot
Architecture-Driven Synthesis of Reconfigurable Cells. DSD (2009)
Kevin J. M. Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot
Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system. ASAP (2009)
Kevin J. M. Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot
System. SAMOS (2009)
Christophe Wolinski, Krzysztof Kuchcinski, Kevin J. M. Martin, Erwan Raffin, François Charot
How Constrains Programming Can Help You in the Generation of Optimized Application Specific Reconfigurable Processor Extensions. ERSA (2009)
Christophe Wolinski, Krzysztof Kuchcinski, Erwan Raffin
Automatic design of application-specific reconfigurable processor extensions with UPaK synthesis kernel. ACM Trans. Design Autom. Electr. Syst. 15 (1) (2009)
Christophe Wolinski, Krzysztof Kuchcinski, Jürgen Teich, Frank Hannig
Area and reconfiguration time minimization of the communication network in regular 2D reconfigurable architectures. FPL (2008)
Christophe Wolinski, Krzysztof Kuchcinski, Jürgen Teich, Frank Hannig
Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures. DSD (2008)
Carl Christian Rolf, Krzysztof Kuchcinski
Load-balancing methods for parallel and distributed constraint solving. CLUSTER (2008)
Christophe Wolinski, Krzysztof Kuchcinski
Automatic Selection of Application-Specific Reconfigurable Processor Extensions. DATE (2008)
Carl Christian Rolf, Krzysztof Kuchcinski
State-copying and Recomputation in Parallel Constraint Programming with Global Constraints. PDP (2008)
Christophe Wolinski, Krzysztof Kuchcinski, Jürgen Teich, Frank Hannig
Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures. FCCM (2008)
Christophe Wolinski, Krzysztof Kuchcinski
Computation Patterns Identification for Instruction Set Extensions Implemented as Reconfigurable Hardware. ERSA (2007)
Mats Petter Pettersson, Radoslaw Szymanek, Krzysztof Kuchcinski
A CP-LP approach to network management in OSPF routing. SAC (2007)
Ana Fuentes Martinez, Krzysztof Kuchcinski
Graph Matching Constraints for Synthesis with Complex Components. DSD (2007)
Mats Petter Pettersson, Krzysztof Kuchcinski
A New Necessary Condition for Shortest Path Routing. NET-COOP (2007)
Christophe Wolinski, Krzysztof Kuchcinski
Identification of Application Specific Instructions Based on Sub-Graph Isomorphism Constraints. ASAP (2007)
Ali R. Iranpour, Krzysztof Kuchcinski
Performance Improvement for H.264 Video Encoding using ILP Embedded Processor. DSD (2006)
Ali R. Iranpour, Krzysztof Kuchcinski
Memory Architecture Evaluation for Video Encoding on Enhanced Embedded Processors. SAMOS (2006)
Henrik Svensson, Viktor Öwall, Krzysztof Kuchcinski
Implementation aspects of a novel speech packet loss concealment method. ISCAS (3) (2005)
Per Andersson, Krzysztof Kuchcinski
Java to Hardware Compilation for non Data Flow Applications. DSD (2005)
Christophe Wolinski, Krzysztof Kuchcinski
A Constraints Programming Approach for Fabric Cell Synthesis. DSD (2005)
Flavius Gruian, Per Andersson, Krzysztof Kuchcinski, Martin Schoeberl
Automatic generation of application-specific systems based on a micro-programmed Java core. SAC (2005)
Christophe Wolinski, Krzysztof Kuchcinski, Maya B. Gokhale
A Constraints Programming Approach to Communication Scheduling on SoPC Architectures. DSD (2004)
Christophe Wolinski, Krzysztof Kuchcinski, Maya B. Gokhale
A constraints programming approach to communication scheduling on SoPC architectures. FPGA (2004)
Per Andersson, Krzysztof Kuchcinski
Distinguished Paper: Automatic Local Memory Architecture Generation for Data Reuse in Custom Data Paths. ERSA (2004)
Ali R. Iranpour, Krzysztof Kuchcinski
Evaluation of SIMD Architecture Enhancement in Embedded Processors for MPEG-4. DSD (2004)
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuchcinski
Data assignment and access scheduling exploration for multi-layer memory architectures. ESTIMedia (2004)
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuchcinski
Time-Energy Design Space Exploration for Multi-Layer Memory Architectures. DATE (2004)
Krzysztof Kuchcinski, Christophe Wolinski
Global approach to assignment and scheduling of complex behaviors based on HCDG and constraint programming. J. Syst. Archit. 49 (12-15) (2003)
Krzysztof Kuchcinski
Constraints-driven scheduling and resource assignment. ACM Trans. Design Autom. Electr. Syst. 8 (3) (2003)
Radoslaw Szymanek, Krzysztof Kuchcinski
Partial task assignment of task graphs under heterogeneous resource constraints. DAC (2003)
Flavius Gruian, Krzysztof Kuchcinski
Uncertainty-based scheduling: energy-efficient ordering for tasks with variable execution time. ISLPED (2003)
Per Andersson, Krzysztof Kuchcinski, Klas Nordberg, Patrick Doherty
Integrating a Computational Model and a Run Time System for Image Processing on a UAV. DSD (2002)
Flavius Gruian, Krzysztof Kuchcinski
LEneS: task scheduling for low-energy systems using variable supply voltage processors. ASP-DAC (2001)
Radoslaw Szymanek, Krzysztof Kuchcinski
A constructive algorithm for memory-aware task assignment and scheduling. CODES (2001)
Krzysztof Kuchcinski, Christophe Wolinski
Synthesis of Conditional Behaviors Using Hierarchical Conditional Dependency Graphs and Constraint Logic Programming. DSD (2001)
Krzysztof Kuchcinski
Constraints-driven design space exploration for distributed embedded systems. J. Syst. Archit. 47 (3-4) (2001)
Radoslaw Szymanek, Krzysztof Kuchcinski
Task Assignment and Scheduling under Memory Constraints. EUROMICRO (2000)
Patrik Dohrty, Gösta H. Granlund, Krzysztof Kuchcinski, Erik Sandewall, Klas Nordberg, Erik Skarman, Johan Wiklund
The WITAS Unmanned Aerial Vehicle Project. ECAI (2000)
Radoslaw Szymanek, Flavius Gruian, Krzysztof Kuchcinski
Digital Systems Design Using Constraint Logic Programming. PACPL (2000)
Per Andersson, Krzysztof Kuchcinski
Performance Oriented Partitioning for Time-Multiplexed FPGA's. EUROMICRO (2000)
Krzysztof Kuchcinski
Integrated Resource Assignment and Scheduling of Task Graphs Using Finite Domain Constraints. DATE (1999)
Radoslaw Szymanek, Krzysztof Kuchcinski
Design Space Exploration in System Level Synthesis under Memory Constraints. EUROMICRO (1999)
Krzysztof Kuchcinski
Synthesis of Distributed Embedded Systems. EUROMICRO (1999)
Flavius Gruian, Krzysztof Kuchcinski
Low-Energy Directed Architecture Selection and Task Scheduling for System-Level Design. EUROMICRO (1999)
Krzysztof Kuchcinski
An Approach to High-Level Synthesis Using Constraint Logic Programming. EUROMICRO (1998)
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli, Paul Pop
Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems. DATE (1998)
Flavius Gruian, Krzysztof Kuchcinski
Operation Binding and Scheduling for Low Power Using Constraint Logic Programming. EUROMICRO (1998)
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli, Paul Pop
Process Scheduling for Performance Estimation and Synthesis of Hardware/Software Systems. EUROMICRO (1998)
Xinli Gu, Erik Larsson, Krzysztof Kuchcinski, Zebo Peng
A controller testability analysis and enhancement technique. ED&TC (1997)
Krzysztof Kuchcinski
Embedded System Synthesis by Timing Constraints Solving. ISSS (1997)
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli
Post-synthesis back-annotation of timing information in behavioral VHDL. J. Syst. Archit. 42 (9-10) (1997)
Krzysztof Kuchcinski
Design of hardware and software systems. J. Syst. Archit. 42 (9-10) (1997)
Petru Eles, Zebo Peng, Krzysztof Kuchcinski, Alexa Doboli
System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search. Des. Autom. Embed. Syst. 2 (1) (1997)
Petru Eles, Zebo Peng, Krzysztof Kuchcinski, Alex Doboli
Hardware/Software Partitioning with Iterative Improvement Heuristics. ISSS (1996)
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli
Hardware/software partitioning of VHDL system specifications. EURO-DAC (1996)
Petru Eles, Krzysztof Kuchcinski, Zebo Peng
Synthesis of systems specified as interacting VHDL processes. Integr. 21 (1-2) (1996)
Peter Grün, Petru Eles, Krzysztof Kuchcinski, Zebo Peng
Automatic Parallelization of a Petri Net-Based Design Representation for High-Level Synthesis. EUROMICRO (1996)
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli
Timing constraint specification and synthesis in behavioral VHDL. EURO-DAC (1995)
Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
An Efficient and Economic Partitioning Approach for Testability. ITC (1995)
Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
Testability analysis and improvement from VHDL behavioral specifications. EURO-DAC (1994)
Petru Eles, Marius Minea, Krzysztof Kuchcinski, Zebo Peng
Synthesis of VHDL concurrent processes. EURO-DAC (1994)
Zebo Peng, Krzysztof Kuchcinski
Automated transformation of algorithms into register-transfer level implementations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (2) (1994)
Krzysztof Kuchcinski
System level modelling and analysis of complex digital systems. Microprocess. Microprogramming 37 (1-5) (1993)
Krzysztof Kuchcinski, Wlodzimierz Drabent, Jan Maluszynski
Automatic Diagnosis of VLSI Digital Circuits Using Algorithmic Debugging. AADEBUG (1993)
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Marius Minea
Compiling VHDL into a high-level synthesis design representation. EURO-DAC (1992)
Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
An approach to testability analysis and improvement for VLSI systems. Microprocess. Microprogramming 35 (1-5) (1992)
Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
Testability measure with reconvergent fanout analysis and its applications. Microprocessing and Microprogramming 32 (1-5) (1991)
Krzysztof Kuchcinski, Zebo Peng
Testability analysis in a VLSI high-level synthesis system. Microprocessing and Microprogramming 28 (1-5) (1990)
Krzysztof Kuchcinski, Zebo Peng
Parallelism extraction from sequential programs for VLSI applications. Microprocess. Microprogramming 23 (1-5) (1988)
Krzysztof Kuchcinski, Bogdan Wiszniewski
Path analysis of distributed programs. ACM Conference on Computer Science (1988)
Krzysztof Kuchcinski, Zebo Peng
Microprogramming implementation of timed Petri nets. Integr. 5 (2) (1987)