Kevin J. M. Martin

ORCID

Publication Activity (10 Years)

Years Active: 2009-2023
Publications (10 Years): 27

Top Venues

DASIP

J. Signal Process. Syst.

IPDPS Workshops

DAC

University of Rennes 1, France (PHD)

Education History

University of Rennes 1, France

PHD

Publications

Satyajit Das, Kevin J. M. Martin, Thomas Peyret, Philippe Coussy
An Efficient and Flexible Stochastic CGRA Mapping Approach. ACM Trans. Embed. Comput. Syst. 22 (1) (2023)
Mostafa Rizk, Kevin J. M. Martin, Jean-Philippe Diguet
Run-Time Remapping Algorithm of Dataflow Actors on NoC-Based Heterogeneous MPSoCs. IEEE Trans. Parallel Distributed Syst. 33 (10) (2022)
Kevin J. M. Martin
Twenty Years of Automated Methods for Mapping Applications on CGRA. IPDPS Workshops (2022)
Chilankamol Sunny, Satyajit Das, Kevin J. M. Martin, Philippe Coussy
Energy Efficient Hardware Loop Based Optimization for CGRAs. J. Signal Process. Syst. 94 (9) (2022)
Marcelo Ruaro, Kevin J. M. Martin
ManyGUI: A Graphical Tool to Accelerate Many-core Debugging Through Communication, Memory, and Energy Profiling. DroneSE/RAPIDO@HiPEAC (2022)
Alemeh Ghasemi, Marcelo Ruaro, Rodrigo Cataldo, Jean-Philippe Diguet, Kevin J. M. Martin
The Impact of Cache and Dynamic Memory Management in Static Dataflow Applications. J. Signal Process. Syst. 94 (7) (2022)
Navonil Chatterjee, Marcelo Ruaro, Kevin J. M. Martin, Jean-Philippe Diguet
Mitigating Transceiver and Token Controller Permanent Faults in Wireless Network-on-Chip. PDP (2022)
Rodrigo Cataldo, Ramon Fernandes, Kevin J. M. Martin, Jarbas Silveira, Gustavo Sanchez, Johanna Sepúlveda, César A. M. Marcon, Jean-Philippe Diguet
Subutai: Speeding Up Legacy Parallel Applications Through Data Synchronization. IEEE Trans. Parallel Distributed Syst. 32 (5) (2021)
Chilankamol Sunny, Satyajit Das, Kevin J. M. Martin, Philippe Coussy
Hardware Based Loop Optimization for CGRA Architectures. ARC (2021)
Alemeh Ghasemi, Rodrigo Cataldo, Jean-Philippe Diguet, Kevin J. M. Martin
On Cache Limits for Dataflow Applications and Related Efficient Memory Management Strategies. DASIP (2021)
Rohit Prasad, Satyajit Das, Kevin J. M. Martin, Philippe Coussy
Floating Point CGRA based Ultra-Low Power DSP Accelerator. J. Signal Process. Syst. 93 (10) (2021)
Satyajit Das, Rohit Prasad, Kevin J. M. Martin, Philippe Coussy
Energy Efficient Acceleration Of Floating Point Applications Onto CGRA. ICASSP (2020)
Rohit Prasad, Satyajit Das, Kevin J. M. Martin, Giuseppe Tagliavini, Philippe Coussy, Luca Benini, Davide Rossi
TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE. DATE (2020)
Satyajit Das, Kevin J. M. Martin, Davide Rossi, Philippe Coussy, Luca Benini
An Energy-Efficient Integrated Programmable Array Accelerator and Compilation Flow for Near-Sensor Ultralow Power Processing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (6) (2019)
Satyajit Das, Kevin J. M. Martin, Philippe Coussy
Context-memory Aware Mapping for Energy Efficient Acceleration with CGRAs. DATE (2019)
Satyajit Das, Kevin J. M. Martin, Philippe Coussy, Davide Rossi
A Heterogeneous Cluster with Reconfigurable Accelerator for Energy Efficient Near-Sensor Data Analytics. ISCAS (2018)
Hemanta Kumar Mondal, Rodrigo Cadore Cataldo, César Augusto Missio Marcon, Kevin J. M. Martin, Sujay Deb, Jean-Philippe Diguet
Broadcast- and Power-Aware Wireless NoC for Barrier Synchronization in Parallel Computing. SoCC (2018)
Rodrigo Cataldo, Ramon Fernandes, Kevin J. M. Martin, Johanna Sepúlveda, Altamiro Amadeu Susin, César A. M. Marcon, Jean-Philippe Diguet
Subutai: distributed synchronization primitives in NoC interfaces for legacy parallel-applications. DAC (2018)
Hugo Miomandre, Julien Hascoët, Karol Desnos, Kevin J. M. Martin, Benoît Dupont de Dinechin, Jean-François Nezan
Embedded Runtime for Reconfigurable Dataflow Graphs on Manycore Architectures. PARMA-DITAM@HiPEAC (2018)
Thanh Dinh Ngo, Kevin J. M. Martin, Jean-Philippe Diguet
Move Based Algorithm for Runtime Mapping of Dataflow Actors on Heterogeneous MPSoCs. J. Signal Process. Syst. 87 (1) (2017)
Satyajit Das, Davide Rossi, Kevin J. M. Martin, Philippe Coussy, Luca Benini
A 142MOPS/mW integrated programmable array accelerator for smart visual processing. ISCAS (2017)
Satyajit Das, Kevin J. M. Martin, Philippe Coussy, Davide Rossi, Luca Benini
Efficient mapping of CDFG onto coarse-grained reconfigurable array architectures. ASP-DAC (2017)
Satyajit Das, Thomas Peyret, Kevin J. M. Martin, Gwenolé Corre, Mathieu Thevenin, Philippe Coussy
A Scalable Design Approach to Efficiently Map Applications on CGRAs. ISVLSI (2016)
Kevin J. M. Martin, Mostafa Rizk, Martha Johanna Sepúlveda, Jean-Philippe Diguet
Notifying memories: a case-study on data-flow applications with NoC interfaces implementation. DAC (2016)
Pierre Langlois, Kevin J. M. Martin, Eduardo Juárez Martínez
Demo Night. DASIP (2016)
Kevin J. M. Martin, Yvan Eustache, Jean-Philippe Diguet, Thanh Dinh Ngo, Emmanuel Casseau, Yaset Oliva
Compa backend: A dynamic runtime for the execution of dataflow programs onto multi-core platforms. DASIP (2015)
Paola Vallejo, Mickaël Kerboeuf, Kevin J. M. Martin, Jean-Philippe Babau
Improving reuse by means of asymmetrical model migrations: An application to the Orcc case study. MoDELS (2015)
Yaset Oliva, Emmanuel Casseau, Kevin J. M. Martin, Pierre Bomel, Jean-Philippe Diguet, Hervé Yviquel, Mickaël Raulet, Erwan Raffin, Laurent Morin
Orcc's compa-backend demonstration. DASIP (2014)
Pierre Bomel, Kevin J. M. Martin, Jean-Philippe Diguet
Virtual Devices for Hot-Pluggable Processors. DSD (2014)
Thomas Peyret, Gwenolé Corre, Mathieu Thevenin, Kevin J. M. Martin, Philippe Coussy
Efficient application mapping on CGRAs based on backward simultaneous scheduling/binding and dynamic graph transformations. ASAP (2014)
Thomas Peyret, Gwenolé Corre, Mathieu Thevenin, Kevin J. M. Martin, Philippe Coussy
An automated design approach to map applications on CGRAs. ACM Great Lakes Symposium on VLSI (2014)
Thanh Dinh Ngo, Daniel Sepulveda, Kevin J. M. Martin, Jean-Philippe Diguet
Communication-model based embedded mapping of dataflow actors on heterogeneous MPSoC. DASIP (2014)
Antoine Floch, Tomofumi Yuki, Ali El Moussawi, Antoine Morvan, Kevin J. M. Martin, Maxime Naullet, Mythri Alle, Ludovic L'Hours, Nicolas Simon, Steven Derrien, François Charot, Christophe Wolinski, Olivier Sentieys
GeCoS: A framework for prototyping custom hardware design flows. SCAM (2013)
Pierre Bomel, Kevin J. M. Martin, Jean-Philippe Diguet
Virtual UARTs for Reconfigurable Multi-processor Architectures. IPDPS Workshops (2013)
Kevin J. M. Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot
Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation. ACM Trans. Reconfigurable Technol. Syst. 5 (2) (2012)
Kevin J. M. Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot
Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system. ASAP (2009)
Kevin J. M. Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot
System. SAMOS (2009)
Christophe Wolinski, Krzysztof Kuchcinski, Kevin J. M. Martin, Erwan Raffin, François Charot
How Constrains Programming Can Help You in the Generation of Optimized Application Specific Reconfigurable Processor Extensions. ERSA (2009)

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Publication Activity (10 Years)

Top Topics

Top Venues

Kevin J. M. Martin