Floating Point CGRA based Ultra-Low Power DSP Accelerator.
Rohit PrasadSatyajit DasKevin J. M. MartinPhilippe CoussyPublished in: J. Signal Process. Syst. (2021)
Keyphrases
- floating point
- ultra low power
- low power
- digital signal processing
- high speed
- low cost
- power consumption
- fixed point
- square root
- digital signal processor
- signal processing
- parallel implementation
- single chip
- field programmable gate array
- low power consumption
- sparse matrices
- instruction set
- fast fourier transform
- data structure
- interval arithmetic
- markov random field
- floating point arithmetic
- dynamic programming