Login / Signup
Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures.
Christophe Wolinski
Krzysztof Kuchcinski
Jürgen Teich
Frank Hannig
Published in:
FCCM (2008)
Keyphrases
</>
processor array
parallel implementation
parallel algorithm
parallel computers
general purpose
mesh connected
interconnection networks
data transfer
distribution network
co occurrence
ad hoc networks
embedded systems
array processor