Kiamal Z. Pekmestzi

Publication Activity (10 Years)

Years Active: 1996-2023
Publications (10 Years): 31

Top Topics

Eliminate Redundant

Fault Detection

Pareto Frontier

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Vasileios Leon, Muhammad Abdullah Hanif, Giorgos Armeniakos, Xun Jiao, Muhammad Shafique, Kiamal Z. Pekmestzi, Dimitrios Soudris
Approximate Computing Survey, Part II: Application-Specific & Architectural Approximation Techniques and Applications. CoRR (2023)
Vasileios Leon, Muhammad Abdullah Hanif, Giorgos Armeniakos, Xun Jiao, Muhammad Shafique, Kiamal Z. Pekmestzi, Dimitrios Soudris
Approximate Computing Survey, Part I: Terminology and Software & Hardware Approximation Techniques. CoRR (2023)
Vasileios Leon, Kiamal Z. Pekmestzi, Dimitrios Soudris
Systematic Embedded Development and Implementation Techniques on Intel Myriad VPUs. VLSI-SoC (2022)
Vasileios Leon, Georgios Makris, Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris
MAx-DNN: Multi-Level Arithmetic Approximation for Energy-Efficient DNN Hardware Accelerators. LASCAS (2022)
Vasileios Leon, Kiamal Z. Pekmestzi, Dimitrios Soudris
Exploiting the Potential of Approximate Arithmetic in DSP & AI Hardware Accelerators. FPL (2021)
Vasileios Leon, Theodora Paparouni, Evangelos Petrongonas, Dimitrios Soudris, Kiamal Z. Pekmestzi
Improving Power of DSP and CNN Hardware Accelerators Using Approximate Floating-point Multipliers. ACM Trans. Embed. Comput. Syst. 20 (5) (2021)
George Lentaris, George Chatzitsompanis, Vasileios Leon, Kiamal Z. Pekmestzi, Dimitrios Soudris
Combining Arithmetic Approximation Techniques for Improved CNN Circuit Design. ICECS (2020)
Fotios Ntouskas, Constantinos Efstathiou, Kiamal Z. Pekmestzi
Efficient design of magnitude and 2's complement comparators. Integr. 71 (2020)
Constantinos Efstathiou, Kiamal Z. Pekmestzi, Nikolaos Moschopoulos
On the Diminished-1 Modulo 2n+1 Addition and Subtraction. J. Circuits Syst. Comput. 29 (5) (2020)
Vasileios Leon, Konstantinos Asimakopoulos, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
Cooperative Arithmetic-Aware Approximation Techniques for Energy-Efficient Multipliers. DAC (2019)
Spyridon Mouselinos, Vasileios Leon, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
TF2FPGA: A Framework for Projecting and Accelerating Tensorflow CNNs on FPGA Platforms. MOCAST (2019)
Vasileios Leon, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
Energy-efficient VLSI implementation of multipliers with double LSB operands. IET Circuits Devices Syst. 13 (6) (2019)
Georgios Zervakis, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
Multi-Level Approximate Accelerator Synthesis Under Voltage Island Constraints. IEEE Trans. Circuits Syst. II Express Briefs (4) (2019)
Vasileios Leon, Georgios Zervakis, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
Walking through the Energy-Error Pareto Frontier of Approximate Multipliers. IEEE Micro 38 (4) (2018)
Charalampos Marantos, Nikolaos Karavalakis, Vasileios Leon, Vasileios Tsoutsouras, Kiamal Z. Pekmestzi, Dimitrios Soudris
Efficient support vector machines implementation on Intel/Movidius Myriad 2. MOCAST (2018)
Georgios Zervakis, Fotios Ntouskas, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
VOSsim: A Framework for Enabling Fast Voltage Overscaling Simulation for Approximate Computing Circuits. IEEE Trans. Very Large Scale Integr. Syst. 26 (6) (2018)
Vasileios Leon, Georgios Zervakis, Dimitrios Soudris, Kiamal Z. Pekmestzi
Approximate Hybrid High Radix Encoding for Energy-Efficient Inexact Multipliers. IEEE Trans. Very Large Scale Integr. Syst. 26 (3) (2018)
Fotis Douskas, Kiamal Z. Pekmestzi
On the design of the FFT Butterfly Units. MOCAST (2017)
Nikolaos Eftaxiopoulos, Nicholas Axelos, Kiamal Z. Pekmestzi
DIRT latch: A novel low cost double node upset tolerant latch. Microelectron. Reliab. 68 (2017)
Nikolaos Eftaxiopoulos, Nicholas Axelos, Kiamal Z. Pekmestzi
Low latency radiation tolerant self-repair reconfigurable SRAM architecture. Microelectron. Reliab. 56 (2016)
Kostas Tsoumanis, Sotirios Xydis, Georgios Zervakis, Kiamal Z. Pekmestzi
Flexible DSP Accelerator Architecture Exploiting Carry-Save Arithmetic. IEEE Trans. Very Large Scale Integr. Syst. 24 (1) (2016)
Georgios Zervakis, Kostas Tsoumanis, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
Design-Efficient Approximate Multiplication Circuits Through Partial Product Perforation. IEEE Trans. Very Large Scale Integr. Syst. 24 (10) (2016)
Kiamal Z. Pekmestzi, Kostas Tsoumanis, Constantinos Efstathiou
Fused modulo 2n + 1 add-multiply unit for weighted operands. DTIS (2016)
Kostas Tsoumanis, Nicholas Axelos, Nikolaos Moschopoulos, Georgios Zervakis, Kiamal Z. Pekmestzi
Pre-Encoded Multipliers Based on Non-Redundant Radix-4 Signed-Digit Encoding. IEEE Trans. Computers 65 (2) (2016)
Kiamal Z. Pekmestzi, Constantinos Efstathiou
Design of Efficient 1's Complement Modified Booth Multiplier. DSD (2016)
Nikolaos Eftaxiopoulos, Nicholas Axelos, Georgios Zervakis, Kostas Tsoumanis, Kiamal Z. Pekmestzi
Delta DICE: A Double Node Upset resilient latch. MWSCAS (2015)
Nikolaos Eftaxiopoulos, Nicholas Axelos, Kiamal Z. Pekmestzi
DONUT: A Double Node Upset Tolerant Latch. ISVLSI (2015)
Nikolaos Eftaxiopoulos-Sarris, Nicholas Axelos, Kiamal Z. Pekmestzi
Low leakage radiation tolerant CAM/TCAM cell. IOLTS (2015)
Georgios Zervakis, Sotirios Xydis, Kostas Tsoumanis, Dimitrios Soudris, Kiamal Z. Pekmestzi
Hybrid approximate multiplier architectures for improved power-accuracy trade-offs. ISLPED (2015)
Georgios Zervakis, Kostas Tsoumanis, Sotirios Xydis, Nicholas Axelos, Kiamal Z. Pekmestzi
Approximate Multiplier Architectures Through Partial Product Perforation: Power-Area Tradeoffs Analysis. ACM Great Lakes Symposium on VLSI (2015)
Constantinos Efstathiou, Kostas Tsoumanis, Kiamal Z. Pekmestzi, Ioannis Voyiatzis
Modulo 2n ± 1 Fused Add-Multiply Units. ISVLSI (2015)
Nikolaos Eftaxiopoulos-Sarris, Nicholas Axelos, Georgios Zervakis, Kostas Tsoumanis, Kiamal Z. Pekmestzi
An independent dual gate SOI FinFET soft-error resilient memory cell. IDT (2014)
Kostas Tsoumanis, Kiamal Z. Pekmestzi, Constantinos Efstathiou
- 1 add-multiply unit. ICECS (2014)
Constantinos Efstathiou, Nikos K. Moshopoulos, Nicholas Axelos, Kiamal Z. Pekmestzi
+1 multiply and multiply-add units based on modified Booth encoding. Integr. 47 (1) (2014)
Georgios Zervakis, Nikolaos Eftaxiopoulos-Sarris, Kostas Tsoumanis, Nicholas Axelos, Kiamal Z. Pekmestzi
A segmentation-based BISR scheme. ASP-DAC (2014)
Georgios Zervakis, Nikolaos Eftaxiopoulos-Sarris, Kostas Tsoumanis, Nicholas Axelos, Kiamal Z. Pekmestzi
A high radix montgomery multiplier with concurrent error detection. IDT (2014)
Nikolaos Eftaxiopoulos-Sarris, Georgios Zervakis, Kiamal Z. Pekmestzi, Costas Efstathiou
High performance MAC designs. IDT (2014)
Constantinos Efstathiou, Kostas Tsoumanis, Kiamal Z. Pekmestzi, Ioannis Voyiatzis
+1 multiply-add-add units. DTIS (2014)
Nicholas Axelos, Nikolaos Eftaxiopoulos-Sarris, Georgios Zervakis, Kostas Tsoumanis, Kiamal Z. Pekmestzi
FF-DICE: An 8T soft-error tolerant cell using Independent Dual Gate SOI FinFETs. IOLTS (2014)
Kostas Tsoumanis, Sotirios Xydis, Constantinos Efstathiou, Nikolaos Moschopoulos, Kiamal Z. Pekmestzi
An Optimized Modified Booth Recoder for Efficient Design of the Add-Multiply Operator. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2014)
Kostas Tsoumanis, Constantinos Efstathiou, Kiamal Z. Pekmestzi
+1 addition and multiplication for redundant operands. IDT (2014)
Kostas Tsoumanis, Constantinos Efstathiou, Nikolaos Moschopoulos, Kiamal Z. Pekmestzi
±1 residue generators. VLSI-SoC (2013)
Isidoros Sideris, Kiamal Z. Pekmestzi
A column parity based fault detection mechanism for FIFO buffers. Integr. 46 (3) (2013)
Costas Efstathiou, Nikolaos Moschopoulos, Ioannis Voyiatzis, Kiamal Z. Pekmestzi
+ 1 dot product and generalized multiply-add units. Comput. Electr. Eng. 39 (2) (2013)
Kiamal Z. Pekmestzi, Constantinos Efstathiou, Nikolaos Moschopoulos, Kostas Tsoumanis
+1 multiplication for the idea block cipher. ACM Great Lakes Symposium on VLSI (2013)
Nikolaos Eftaxiopoulos-Sarris, Georgios Zervakis, Kostas Tsoumanis, Kiamal Z. Pekmestzi
A radiation tolerant and self-repair memory cell. IOLTS (2013)
Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos
Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offs. ACM Trans. Design Autom. Electr. Syst. 18 (1) (2012)
Isidoros Sideris, Kiamal Z. Pekmestzi
Cost Effective Protection Techniques for TCAM Memory Arrays. IEEE Trans. Computers 61 (12) (2012)
Nicholas Axelos, Kiamal Z. Pekmestzi, Dimitris Gizopoulos
Efficient Memory Repair Using Cache-Based Redundancy. IEEE Trans. Very Large Scale Integr. Syst. 20 (12) (2012)
Constantinos Efstathiou, Nikolaos Moschopoulos, Kostas Tsoumanis, Kiamal Z. Pekmestzi
On the Design of Configurable Modulo 2n±1 Residue Generators. DSD (2012)
Constantinos Efstathiou, Kiamal Z. Pekmestzi, Nicholas Axelos
On the Design of Modulo 2^n+1 Multipliers. DSD (2011)
Sotirios Xydis, George Economakos, Dimitrios Soudris, Kiamal Z. Pekmestzi
High Performance and Area Efficient Flexible DSP Datapath Synthesis. IEEE Trans. Very Large Scale Integr. Syst. 19 (3) (2011)
Nicholas Axelos, Kiamal Z. Pekmestzi, Nikolaos Moschopoulos
A New Low-Power Soft-Error Tolerant SRAM Cell. ISVLSI (2010)
Nicholas Axelos, Kiamal Z. Pekmestzi
A bit level area aware cache-based architecture for memory repairs. IOLTS (2010)
Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos
A High Level Synthesis Exploration Framework with Iterative Design Space Partitioning. ISVLSI (Selected papers) (2010)
Sotirios Xydis, Christos Skouroumounis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos
Efficient High Level Synthesis Exploration Methodology Combining Exhaustive and Gradient-Based Pruned Searching. ISVLSI (2010)
Dimitris Bekiaris, Antonis Papanikolaou, Christos Papameletis, Dimitrios Soudris, George Economakos, Kiamal Z. Pekmestzi
A Temperature-Aware Time-Dependent Dielectric Breakdown Analysis Framework. PATMOS (2010)
Sotirios Xydis, Christos Skouroumounis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos
Designing efficient DSP datapaths through compiler-in-the-loop exploration methodology. ISCAS (2010)
Sotirios Xydis, Alexandros Bartzas, Iraklis Anagnostopoulos, Dimitrios Soudris, Kiamal Z. Pekmestzi
Custom multi-threaded Dynamic Memory Management for Multiprocessor System-on-Chip platforms. ICSAMOS (2010)
Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos
High-Level Synthesis Methodologies for Delay-Area Optimized Coarse-Grained Reconfigurable Coprocessor Architectures. ISVLSI (2010)
Isidoros Sideris, Nikos K. Moshopoulos, Kiamal Z. Pekmestzi
A hardware peripheral for Java bytecodes translation acceleration. SAC (2010)
Nikos Anastasiadis, Isidoros Sideris, Kiamal Z. Pekmestzi
A fast multiplier-less edge detection accelerator for FPGAs. SAC (2010)
Sotirios Xydis, Ioannis Triantafyllou, George Economakos, Kiamal Z. Pekmestzi
Flexible Datapath Synthesis through Arithmetically Optimized Operation Chaining. AHS (2009)
Dimitris Bekiaris, Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi
A design methodology for high-performance and low-leakage fixed-point transpose FIR filters. ICECS (2009)
Isidoros Sideris, Kiamal Z. Pekmestzi, George Economakos
Extending an embedded RISC microprocessor for efficient translation based Java execution. Microprocess. Microsystems 33 (7-8) (2009)
Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi
Designing coarse-grain reconfigurable architectures by inlining flexibility into custom arithmetic data-paths. Integr. 42 (4) (2009)
Dimitris Bekiaris, Kiamal Z. Pekmestzi, Christos A. Papachristou
A high-speed radix-4 multiplexer-based array multiplier. ACM Great Lakes Symposium on VLSI (2008)
Isidoros Sideris, Kiamal Z. Pekmestzi, George Economakos
An instruction set extension for java bytecodes translation acceleration. ICSAMOS (2008)
Kiamal Z. Pekmestzi, Nicholas Axelos, Isidoros Sideris, Nikos K. Moshopoulos
A BISR Architecture for Embedded Memories. IOLTS (2008)
Sotirios Xydis, Isidoros Sideris, George Economakos, Kiamal Z. Pekmestzi
A flexible architecture for DSP applications combining high performance arithmetic with small scale configurability. EUSIPCO (2008)
Sotirios Xydis, George Economakos, Dimitrios Soudris, Kiamal Z. Pekmestzi
Mapping DSP Applications onto High-Performance Architectural Templates with Inlined Flexibility. AHS (2008)
Isidoros Sideris, Kiamal Z. Pekmestzi, George Economakos
A predecoding technique for ILP exploitation in Java processors. J. Syst. Archit. 54 (7) (2008)
Dimitris Bekiaris, George Economakos, Kiamal Z. Pekmestzi
Efficient serial and parallel implementation of programmable fir filters based on the merging technique. EUSIPCO (2008)
Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi
A Reconfigurable Arithmetic Data-path Based On Regular Interconnection. AHS (2007)
Dimitris Bekiaris, Isidoros Sideris, George Economakos, Kiamal Z. Pekmestzi
Power-Efficient and Low Latency Implementation of Programmable FIR filters Using Carry-Save Arithmetic. ICECS (2007)
Isidoros Sideris, Dimitris Pilitsos, George Economakos, Kiamal Z. Pekmestzi
Building embedded DSP applications in a Java modeling framework. EUSIPCO (2007)
Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi
Flexibility Inlining into Arithmetic Data-paths Exploiting A Regular Interconnection Scheme. ICSAMOS (2007)
Osama Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi
An Elliptic Curve Cryptosystem Design Based on FPGA Pipeline Folding. IOLTS (2007)
Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi
A regular interconnection scheme for efficient mapping of DSP kernels into reconfigurable hardware. EUSIPCO (2007)
Paul Bougas, Andreas Tsirikos, Kostas Anagnostopoulos, Isidoros Sideris, Kiamal Z. Pekmestzi
Segmentation based design of serial parallel multipliers. ISCAS (2006)
Osama Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi
A Large Scale Adaptable Multiplier for Cryptographic Applications. AHS (2006)
Osama Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi
FPGA-based Design of a Large Moduli Multiplier for Public Key Cryptographic Systems. ICCD (2006)
Isidoros Sideris, George Economakos, Kiamal Z. Pekmestzi
A cache based stack folding technique for high performance Java processors. JTRES (2006)
Paraskevas Kalivas, Vassilis Vassilakis, Chris Meletis, Kiamal Z. Pekmestzi
A New Low Latency Parallel FIR Filter Scheme. J. VLSI Signal Process. 39 (3) (2005)
Isidoros Sideris, Kostas Anagnostopoulos, Paraskevas Kalivas, Kiamal Z. Pekmestzi
Novel systolic schemes for serial-parallel multiplication. EUSIPCO (2005)
E. Chaniotakis, Paraskevas Kalivas, Kiamal Z. Pekmestzi
Long Number Bit-Serial Squarers. IEEE Symposium on Computer Arithmetic (2005)
Paul Bougas, Paraskevas Kalivas, Andreas Tsirikos, Kiamal Z. Pekmestzi
Pipelined array-based FIR filter folding. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2005)
Paraskevas Kalivas, Andreas Tsirikos, Paul Bougas, Kiamal Z. Pekmestzi
100% operational efficient bit-serial programmable FIR digital filters. EUSIPCO (2005)
Paraskevas Kalivas, Kiamal Z. Pekmestzi, Paul Bougas, Andreas Tsirikos, Kostas Gotsis
Low-latency and high-efficiency bit serial-serial multipliers. EUSIPCO (2004)
Paraskevas Kalivas, Paul Bougas, Vassilis Vassilakis, Christos Meletis, Kiamal Z. Pekmestzi
Pipeline array implementation of FIR filters. EUSIPCO (2004)
Kiamal Z. Pekmestzi, Nikos K. Moshopoulos
A Systolic, High Speed Architecture for an RSA Cryptosystem. J. VLSI Signal Process. 32 (3) (2002)
Nikos K. Moshopoulos, Kiamal Z. Pekmestzi
A Novel Systolic Architecture for Efficient RSA Implementation. Public Key Cryptography (2001)
Kostas Marinis, Nikos K. Moshopoulos, Fotis Karoubalis, Kiamal Z. Pekmestzi
On the Hardware Implementation of the 3GPP Confidentiality and Integrity Algorithms. ISC (2001)
Kiamal Z. Pekmestzi, Nikos K. Moshopoulos
A bit-interleaved systolic architecture for a high-speed RSA system. Integr. 30 (2) (2001)
Kiamal Z. Pekmestzi, Paraskevas Kalivas
Constant Number Serial Pipeline Multipliers. J. VLSI Signal Process. 26 (3) (2000)
Kiamal Z. Pekmestzi, Nikolaos Moshopoulos, Paraskevas Kalivas
A systolic serial squarer of continuous operation. EUSIPCO (2000)
Christos Gr. Caraiscos, Kiamal Z. Pekmestzi
A scheme for the VLSI implementation of FIR digital filters with reduced latency. EUSIPCO (1998)
George Economakos, George K. Papakonstantinou, Kiamal Z. Pekmestzi, Panayotis Tsanakas
Hardware compilation using attribute grammars. CHARME (1997)
Christos Gr. Caraiscos, Kiamal Z. Pekmestzi
Systolic digital filters with reduced latency - serial implementation. Int. J. Circuit Theory Appl. 24 (4) (1996)