A bit level area aware cache-based architecture for memory repairs.
Nicholas AxelosKiamal Z. PekmestziPublished in: IOLTS (2010)
Keyphrases
- memory hierarchy
- memory access
- main memory
- random access memory
- virtual memory
- memory management
- memory subsystem
- multithreading
- computing power
- management system
- hash table
- application level
- integrity constraints
- data structure
- processing units
- data access
- operating system
- memory space
- design considerations
- computer architecture
- shared memory
- memory requirements
- level parallelism
- cache conscious