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Jim Tschanz
Publication Activity (10 Years)
Years Active: 2009-2023
Publications (10 Years): 5
Top Topics
Nm Technology
Metal Oxide Semiconductor
Noise Suppression
Gate Dielectrics
Top Venues
VLSI Circuits
ISLPED
VLSI Technology and Circuits
ISSCC
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Publications
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Charles Augustine
,
Pascal Meinerzhagen
,
Wootaek Lim
,
A. Veerabathini
,
M. Bright
,
K. Mojjada
,
Jim Tschanz
,
Muhammad M. Khellah
,
Vivek De
A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOS.
VLSI Technology and Circuits
(2023)
Vida Ilderem
,
Stefano Pellerano
,
Jim Tschanz
,
Tanay Karnik
,
Vivek De
Innovations for Intelligent Edge.
ESSCIRC
(2022)
Jaydeep P. Kulkarni
,
Andres Malavasi
,
Charles Augustine
,
Carlos Tokunaga
,
Jim Tschanz
,
Muhammad M. Khellah
,
Vivek De
Low Swing and Column Multiplexed Bitline Techniques for Low-Vmin, Noise-Tolerant, High-Density, 1R1W 8T-Bitcell SRAM in 10nm FinFET CMOS.
VLSI Circuits
(2020)
Somnath Paul
,
Turbo Majumder
,
Charles Augustine
,
Andres F. Malavasi
,
S. Usirikayala
,
R. Kumar
,
Jisna Kollikunnel
,
S. Chhabra
,
Satish Yada
,
M. L. Barajas
,
C. Ornelas
,
Dan Lake
,
Muhammad M. Khellah
,
Jim Tschanz
,
Vivek De
A 0.05pJ/Pixel 70fps FHD 1Meps Event-Driven Visual Data Processing Unit.
VLSI Circuits
(2020)
Harish Kumar Krishnamurthy
,
Vaibhav A. Vaidya
,
Sheldon Weng
,
Krishnan Ravichandran
,
Pavan Kumar
,
Stephen T. Kim
,
Rinkle Jain
,
George E. Matthew
,
Jim Tschanz
,
Vivek De
20.1 A digitally controlled fully integrated voltage regulator with on-die solenoid inductor with planar magnetic core in 14nm tri-gate CMOS.
ISSCC
(2017)
Ahmed M. Ammar
,
Rafik Guindi
,
Ethan Shih
,
Carlos Tokunaga
,
Jim Tschanz
,
Muhammad M. Khellah
A fully integrated charge sharing active decap scheme for power supply noise suppression.
SoCC
(2015)
Chia-Hsiang Chen
,
Keith A. Bowman
,
Charles Augustine
,
Zhengya Zhang
,
Jim Tschanz
Minimum supply voltage for sequential logic circuits in a 22nm technology.
ISLPED
(2013)
Keith A. Bowman
,
Carlos Tokunaga
,
Tanay Karnik
,
Vivek K. De
,
Jim Tschanz
A 22nm dynamically adaptive clock distribution for voltage droop tolerance.
VLSIC
(2012)
Arijit Raychowdhury
,
Jim Tschanz
,
Keith A. Bowman
,
Shih-Lien Lu
,
Paolo A. Aseron
,
Muhammad M. Khellah
,
Bibiche M. Geuskens
,
Carlos Tokunaga
,
Chris Wilkerson
,
Tanay Karnik
,
Vivek De
Error Detection and Correction in Microprocessor Core and Memory Due to Fast Dynamic Voltage Droops.
IEEE J. Emerg. Sel. Topics Circuits Syst.
1 (3) (2011)
Yu Cao
,
Jim Tschanz
,
Pradip Bose
Guest Editors' Introduction: Reliability Challenges in Nano-CMOS Design.
IEEE Des. Test Comput.
26 (6) (2009)