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Hao San
ORCID
Publication Activity (10 Years)
Years Active: 1999-2023
Publications (10 Years): 27
Top Topics
Binary Representation
Noise Shaping
Quantization Error
Delta Sigma
Top Venues
ISPACS
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
IEICE Trans. Electron.
MIXDES
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Publications
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Eiki Kayama
,
Kenta Mori
,
Taichi Maebou
,
Yuanchi Chen
,
Hao San
,
Tatsuji Matsuura
,
Masao Hotta
Thermal Noise Analysis of Ring Amplifier in Cyclic Analog-to-Digital Converter.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
106 (5) (2023)
Tomoharu Yamauchi
,
Hao San
,
Nobuyuki Yoshikawa
,
Olivia Chen
A Study on the Efficient Design of Adders Using Adiabatic Quantum-Flux-Parametron Circuits.
GCCE
(2022)
Taichi Maebou
,
Yuanchi Chen
,
Eiki Kayama
,
Kenta Mori
,
Hao San
,
Tatsuji Matsuura
,
Masao Hotta
A 0.7V 14bit Hybrid ADC in 65nm SOTB CMOS.
ISPACS
(2021)
Eiki Kayama
,
Kenta Mori
,
Maebou Taichi
,
Yuanchi Chen
,
Hao San
,
Tatsuji Matsuura
,
Masao Hotta
A 0.8V 14bit 294kSPS non-binary cyclic ADC in 65nm SOTB CMOS technology.
ISPACS
(2021)
Yuanchi Chen
,
Hao San
Linearity Compensation for Conversion Error in Non-binary and Binary Hybrid ADC.
ISPACS
(2021)
Kenta Mori
,
Eiki Kayama
,
Taichi Maebou
,
Yuanchi Chen
,
Hao San
,
Tatsuji Matsuura
,
Masao Hotta
A Low-voltage Non-binary Cyclic ADC using Fully Differential Ring Amplifier.
ISPACS
(2021)
Hao San
Foreword.
IEICE Trans. Electron.
(10) (2020)
Chunhui Pan
,
Hao San
Experimental implementation of delta sigma AD modulator using dynamic analog components with simplified operation phase.
IEICE Electron. Express
16 (12) (2019)
Haruo Kobayashi
,
Nene Kushita
,
Minh Tri Tran
,
Koji Asami
,
Hao San
,
Anna Kuwana
,
Akemi Hatta
Analog / Mixed-Signal / RF Circuits for Complex Signal Processing.
ASICON
(2019)
Chunhui Pan
,
Hao San
A 6th-Order Quadrature Bandpass Delta Sigma AD Modulator Using Dynamic Amplifier and Noise Coupling SAR Quantizer.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(3) (2019)
Shuichiro Yamada
,
Toshiki Ohtsu
,
Minami Sasaki
,
Hao San
,
Tatsuji Matsuura
,
Masao Hotta
A 0.8V 14bit 62.5kSPS non-binary cyclic ADC using SOTB CMOS technology.
ISPACS
(2019)
Chunhui Pan
,
Hao San
A 2nd-Order ΔΣAD Modulator Using Dynamic Analog Components with Simplified Operation Phase.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(2) (2018)
Chunhui Pan
,
Hao San
A 6th-Order Complex Bandpass ΔΣ AD Modulator Using Dynamic Amplifier and Noise Coupling SAR Quantizer.
ISPACS
(2018)
Chunhui Pan
,
Hao San
A Noise Coupled ΔΣAD Modulator Using Passive Adder Embedded Noise Shaping SAR Quantizer.
IEICE Trans. Electron.
(7) (2018)
Chunhui Pan
,
Hao San
,
Tsugumichi Shibata
A 720µW 77.93dB SNDR ΔΣ AD Modulator Using Dynamic Analog Components With Simplified Operation Phase.
ISPACS
(2018)
Kota Inoue
,
Tatsuji Matsuura
,
Akira Hyogo
,
Hao San
Non-binary cyclic and binary SAR hybrid ADC.
MIXDES
(2017)
Hiroyuki Tsuchiya
,
Yuki Watanabe
,
Koken Chin
,
Hao San
,
Tatsuji Matsuura
,
Masao Hotta
The design of a 14-bit 400kSPS non-binary pipeline cyclic ADC.
ISPACS
(2017)
Hao San
,
Rompei Sugawara
,
Masao Hotta
,
Tatsuji Matsuura
,
Kazuyuki Aihara
A 12-bit 1.25MS/s Area-Efficient Radix-Value Self-Estimated Non-Binary Cyclic ADC with Relaxed Requirements on Analog Components.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(2) (2017)
Chunhui Pan
,
Hao San
,
Tsugumichi Shibata
A 2nd-order ΔΣAD modulator using ring amplifier and SAR quantizer with simplified operation mode.
MIXDES
(2017)
Yuki Watanabe
,
Hayato Narita
,
Hiroyuki Tsuchiya
,
Tatsuji Matsuura
,
Hao San
,
Masao Hotta
A 14bit 80kSPS non-binary cyclic ADC without high accuracy analog components.
ASP-DAC
(2017)
Hiroyuki Tsuchiya
,
Asato Uchiyama
,
Yuta Misima
,
Yuki Watanabe
,
Tatsuji Matsuura
,
Hao San
,
Masao Hotta
Non-binary cyclic ADC with correlated level shifting technique.
ASP-DAC
(2017)
Yuki Watanabe
,
Koken Chin
,
Hiroyuki Tsuchiya
,
Hao San
,
Tatsuji Matsuura
,
Masao Hotta
Experimental results of reconfigurable non-binary cyclic ADC.
ISPACS
(2017)
Koken Chin
,
Yuta Mishima
,
Yuki Watanabe
,
Hiroyuki Tsuchiya
,
Hao San
,
Tatsuji Matsuura
,
Masao Hotta
A 12-Bit 3.3MS/S pipeline cyclic ADC with correlated level shifting technique.
ISPACS
(2017)
Koken Chin
,
Hao San
,
Atsushi Kitajima
,
Yoshiaki Arai
,
Jun Yamashita
,
Hisashi Ito
Leakage current compensation technique of ESD protection circuit for CMOS operational amplifier.
ISPACS
(2016)
Chunhui Pan
,
Hao San
,
Tsugumichi Shibata
A 2nd-order Delta Sigma AD modulator using dynamic amplifier and dynamic SAR quantizer.
ISPACS
(2016)
Chunhui Pan
,
Hao San
A low-distortion delta-sigma modulator with ring amplifier and passive adder embedded SAR quantizer.
ISPACS
(2015)
Yuta Mishima
,
Toshiki Yamada
,
Asato Uchiyama
,
Tatsuji Matsuura
,
Hao San
,
Masao Hotta
A 10-bit 10Ms/s pipeline cyclic ADC based on β-expansion.
ISPACS
(2015)
Rompei Sugawara
,
Hao San
,
Kazuyuki Aihara
,
Masao Hotta
Experimental Implementation of Non-binary Cyclic ADCs with Radix Value Estimation Algorithm.
IEICE Trans. Electron.
(4) (2014)
Hao San
,
Rompei Sugawara
,
Masao Hotta
,
Tatsuji Matsuura
,
Kazuyuki Aihara
An area-efficient 12-bit 1.25MS/s radix-value self-estimated non-binary ADC with relaxed requirements on analog components.
CICC
(2014)
Hao San
,
Tomonari Kato
,
Tsubasa Maruyama
,
Kazuyuki Aihara
,
Masao Hotta
Non-binary Pipeline Analog-to-Digital Converter Based on β-Expansion.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(2) (2013)
Takaki Makino
,
Yukiko Iwata
,
Yutaka Jitsumatsu
,
Masao Hotta
,
Hao San
,
Kazuyuki Aihara
Rigorous analysis of quantization error of an A/D converter based on β-map.
ISCAS
(2013)
Rie Suzuki
,
Tsubasa Maruyama
,
Hao San
,
Kazuyuki Aihara
,
Masao Hotta
Robust Cyclic ADC Architecture Based on β-Expansion.
IEICE Trans. Electron.
(4) (2013)
Hao San
,
Haruo Kobayashi
Noise-Coupled Image Rejection Architecture of Complex Bandpass DeltaSigmaAD Modulator.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(2) (2010)
Tomohiko Ogawa
,
Haruo Kobayashi
,
Yosuke Takahashi
,
Nobukazu Takai
,
Masao Hotta
,
Hao San
,
Tatsuji Matsuura
,
Akira Abe
,
Katsuyoshi Yagi
,
Toshihiko Mori
SAR ADC Algorithm with Redundancy and Digital Error Correction.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(2) (2010)
Tomohiko Ogawa
,
Tatsuji Matsuura
,
Haruo Kobayashi
,
Nobukazu Takai
,
Masao Hotta
,
Hao San
,
Akira Abe
,
Katsuyoshi Yagi
,
Toshihiko Mori
Non-binary SAR ADC with digital error correction for low power applications.
APCCAS
(2010)
Hao San
,
Haruo Kobayashi
Cross-Noise-Coupled Architecture of Complex Bandpass DeltaSigmaAD Modulator.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(4) (2009)
Tomohiko Ogawa
,
Haruo Kobayashi
,
Masao Hotta
,
Yosuke Takahashi
,
Hao San
,
Nobukazu Takai
SAR ADC algorithm with redundancy.
APCCAS
(2008)
Ibuki Mori
,
Keigo Kimura
,
Yoshihisa Yamada
,
Haruo Kobayashi
,
Yasunori Kobori
,
Santhos Ario Wibowo
,
Kazuya Shimizu
,
Masashi Kono
,
Hao San
High-resolution DPWM generator for digitally controlled DC-DC converters.
APCCAS
(2008)
Hajime Konagaya
,
HaiJun Lin
,
Hao San
,
Haruo Kobayashi
,
Kazumasa Ando
,
Hiroshi Yoshida
,
Chieto Murayama
,
Yukihiro Nisida
ΔΣAD modulator for low power application.
APCCAS
(2008)
Hao San
,
Hajime Konagaya
,
Feng Xu
,
Atsushi Motozawa
,
Haruo Kobayashi
,
Kazumasa Ando
,
Hiroshi Yoshida
,
Chieto Murayama
,
Kanichi Miyazawa
Novel Architecture of Feedforward Second-Order Multibit Delta-Sigma-AD Modulator.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(4) (2008)
Hao San
,
Yoshitaka Jingu
,
Hiroki Wada
,
Hiroyuki Hagiwara
,
Akira Hayakawa
,
Haruo Kobayashi
,
Masao Hotta
A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18µm CMOS.
ASP-DAC
(2007)
Hao San
,
Yoshitaka Jingu
,
Hiroki Wada
,
Hiroyuki Hagiwara
,
Akira Hayakawa
,
Haruo Kobayashi
,
Tatsuji Matsuura
,
Kouichi Yahagi
,
Junya Kudoh
,
Hideo Nakane
,
Masao Hotta
,
Toshiro Tsukada
,
Koichiro Mashiko
,
Atsushi Wada
A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm.
IEICE Trans. Electron.
(6) (2007)
Hao San
,
Akira Hayakawa
,
Yoshitaka Jingu
,
Hiroki Wada
,
Hiroyuki Hagiwara
,
Kazuyuki Kobayashi
,
Haruo Kobayashi
,
Tatsuji Matsuura
,
Kouichi Yahagi
,
Junya Kudoh
,
Hideo Nakane
,
Masao Hotta
,
Toshiro Tsukada
,
Koichiro Mashiko
,
Atsushi Wada
Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(4) (2006)
Jun Otsuki
,
Hao San
,
Haruo Kobayashi
,
Takanori Komuro
,
Yoshihisa Yamada
,
Aiyan Liu
Reducing Spurious Output of Balanced Modulators by Dynamic Matching of I, Q Quadrature Paths.
IEICE Trans. Electron.
(6) (2005)
Hao San
,
Haruo Kobayashi
,
Shinya Kawakami
,
Nobuyuki Kuroiwa
An Element Rotation Algorithm for Multi-bit DAC Nonlinearities in Complex Bandpass \Delta\SigmaAD Modulators.
VLSI Design
(2004)
Mohd Asmawi Mohamed Zin
,
Haruo Kobayashi
,
Kazuya Kobayashi
,
Jun-ichi Ichimura
,
Hao San
,
Yoshitaka Onaya
,
Yasuyuki Kimura
,
Yasushi Yuminaka
,
Yoshisato Sasaki
,
Kouji Tanaka
,
Fuminori Abe
A high-speed CMOS track/hold circuit.
ICECS
(1999)