A 0.7V 14bit Hybrid ADC in 65nm SOTB CMOS.

Taichi Maebou Yuanchi Chen Eiki Kayama Kenta Mori Hao San Tatsuji Matsuura Masao Hotta

Published in: ISPACS (2021)

Keyphrases

single chip
low power
cmos technology
low cost
image sensor
analog to digital converter
nm technology
power consumption
high speed
real time
mixed signal
vlsi circuits
metal oxide semiconductor
silicon on insulator
hybrid approaches
parallel processing
neural network