G. K. Sharma

Publication Activity (10 Years)

Years Active: 1991-2024
Publications (10 Years): 31

Top Topics

Image Processing

Block Matching Algorithm

Energy Efficiency

Top Venues

J. Electron. Test.

Microprocess. Microsystems

Publications

Richa Sharma, G. K. Sharma, Manisha Pattanaik
Adversarial Label Flipping Attack on Supervised Machine Learning-Based HT Detection Systems. ISCAS (2024)
Richa Sharma, G. K. Sharma, Manisha Pattanaik
Novel Label Flipping Dataset Poisoning Attack Against ML-Based HT Detection Systems. APCCAS (2023)
Richa Sharma, G. K. Sharma, Manisha Pattanaik, V. S. S. Prashant
Structural and SCOAP Features Based Approach for Hardware Trojan Detection Using SHAP and Light Gradient Boosting Model. J. Electron. Test. 39 (4) (2023)
Vijaypal Singh Rathor, G. K. Sharma
A New ATPG and Online Monitoring based Technique for Hardware Trojan Detection. Microprocess. Microsystems 101 (2023)
Neelam Arya, Teena Soni, Manisha Pattanaik, G. K. Sharma
Energy efficient logarithmic-based approximate divider for ASIC and FPGA-based implementations. Microprocess. Microsystems 90 (2022)
Richa Sharma, G. K. Sharma, Manisha Pattanaik
A CatBoost Based Approach to Detect Label Flipping Poisoning Attack in Hardware Trojan Detection Systems. J. Electron. Test. 38 (6) (2022)
Richa Sharma, G. K. Sharma, Manisha Pattanaik
A Few Shot Learning based Approach for Hardware Trojan Detection using Deep Siamese CNN. VLSI Design (2021)
Richa Sharma, Vijaypal Singh Rathor, G. K. Sharma, Manisha Pattanaik
A new hardware Trojan detection technique using deep convolutional neural network. Integr. 79 (2021)
Vijaypal Singh Rathor, Bharat Garg, Mandar Patil, G. K. Sharma
Security analysis of image CAPTCHA using a mask R-CNN-based attack model. Int. J. Ad Hoc Ubiquitous Comput. 36 (4) (2021)
Vijaypal Singh Rathor, G. K. Sharma
A Lightweight Robust Logic Locking Technique to Thwart Sensitization and Cone-Based Attacks. IEEE Trans. Emerg. Top. Comput. 9 (2) (2021)
Neelam Arya, Teena Soni, Manisha Pattanaik, G. K. Sharma
READ: A fixed restoring array based accuracy-configurable approximate divider for energy efficiency. Integr. 76 (2021)
Neelam Arya, Manisha Pattanaik, G. K. Sharma
Energy-Efficient Logarithmic Square Rooter for Error-Resilient Applications. IEEE Trans. Very Large Scale Integr. Syst. 29 (11) (2021)
Vijaypal Singh Rathor, Bharat Garg, G. K. Sharma
New lightweight Anti-SAT block design and obfuscation technique to thwart removal attack. Integr. 75 (2020)
Neelam Arya, Teena Soni, Manisha Pattanaik, G. K. Sharma
Bit significance based reconfigurable approximate restoring dividers and square rooters. Microelectron. J. 104 (2020)
Richa Sharma, Nitya Kritin Valivati, G. K. Sharma, Manisha Pattanaik
A New Hardware Trojan Detection Technique using Class Weighted XGBoost Classifier. VDAT (2020)
Neelam Arya, Teena Soni, Manisha Pattanaik, G. K. Sharma
Area and Energy Efficient Approximate Square Rooters for Error Resilient Applications. VLSI Design (2020)
Vijaypal Singh Rathor, Bharat Garg, G. K. Sharma
A Novel Low Complexity Logic Encryption Technique for Design-for-Trust. IEEE Trans. Emerg. Top. Comput. 8 (3) (2020)
Bharat Garg, Shireesh Kumar Rai, Akash Puranik, G. K. Sharma
ES-COINA: A novel energy scalable quality-aware color interpolation architecture. Microprocess. Microsystems 67 (2019)
Neelam Arya, Anil Kumar Rajput, Manisha Pattanaik, G. K. Sharma
Quality Driven Energy Aware Approximated Core Transform Architecture for HEVC Standard. VDAT (2019)
Bharat Garg, G. K. Sharma
A process-tolerant low-power adder architecture for image processing applications. Turkish J. Electr. Eng. Comput. Sci. 27 (3) (2019)
Vijaypal Singh Rathor, Bharat Garg, G. K. Sharma
New Lightweight Architectures for Secure FSM Design to Thwart Fault Injection and Trojan Attacks. J. Electron. Test. 34 (6) (2018)
Vijaypal Singh Rathor, Bharat Garg, G. K. Sharma
An Energy-Efficient Trusted FSM Design Technique to Thwart Fault Injection and Trojan Attacks. VLSI Design (2018)
Vijaypal Singh Rathor, Bharat Garg, G. K. Sharma
New Light Weight Threshold Voltage Defined Camouflaged Gates for Trustworthy Designs. J. Electron. Test. 33 (5) (2017)
Bharat Garg, G. K. Sharma
ACM: An Energy-Efficient Accuracy Configurable Multiplier for Error-Resilient Applications. J. Electron. Test. 33 (4) (2017)
Bharat Garg, G. K. Sharma
Low power signal processing via approximate multiplier for error-resilient applications. ICIIS (2016)
Neha K. Nawandar, Bharat Garg, G. K. Sharma
RICO: A low power repetitive iteration CORDIC for DSP applications in portable devices. J. Syst. Archit. 70 (2016)
Bharat Garg, G. K. Sharma
A quality-aware Energy-scalable Gaussian Smoothing Filter for image processing applications. Microprocess. Microsystems 45 (2016)
Bharat Garg, G. K. Sharma
A block matching algorithm for deriving quality-tunable motion estimation architecture. ICIIS (2016)
Bharat Garg, Sunil Dutt, G. K. Sharma
Bit-width-aware constant-delay run-time Accuracy Programmable Adder for error-resilient applications. Microelectron. J. 50 (2016)
Bharat Garg, V. N. S. K. Chaitanya Goteti, G. K. Sharma
A low-cost energy efficient image scaling processor for multimedia applications. VDAT (2016)
Bharat Garg, Sameer Yadav, G. K. Sharma
An area and performance aware ECG encoder design for wireless healthcare services. VDAT (2016)
Nandakishor Yadav, Shikha Jain, Manisha Pattanaik, G. K. Sharma
A novel stability and process sensitivity driven model for optimal sized FinFET based SRAM. Microelectron. Reliab. 55 (8) (2015)
Ankur Jaiswal, Bharat Garg, Vikas Kaushal, G. K. Sharma
SPAA-Aware 2D Gaussian Smoothing Filter Design Using Efficient Approximation Techniques. VLSI Design (2015)
Bharat Garg, G. K. Sharma
PAID: Process Aware Imprecise DCT Architecture Trading Quality for Energy Efficiency. J. Low Power Electron. 11 (2) (2015)
Vikas Kaushal, Bharat Garg, Ankur Jaiswal, G. K. Sharma
Energy Aware Computation Driven Approximate DCT Architecture for Image Processing. VLSI Design (2015)
Nandakishor Yadav, Manisha Pattanaik, G. K. Sharma
New Topology Approach for Future Process, Voltage and Temperature Aware SRAM Using Independently Controlled Double-Gate FinFET. J. Low Power Electron. 11 (1) (2015)
Vaibhav Jha, Sunny Deol, Mohit Jha, G. K. Sharma
Energy and Latency Aware Application Mapping Algorithm & Optimization for Homogeneous 3D Network on Chip. CoRR (2014)
Vaibhav Jha, Mohit Jha, G. K. Sharma
Estimation of Optimized Energy and Latency Constraints for Task Allocation in 3d Network on Chip. CoRR (2014)
Bharat Garg, Nitesh K. Bharadwaj, G. K. Sharma
Energy scalable approximate DCT architecture trading quality via boundary error-resiliency. SoCC (2014)
Ekta Prajapati, Nandakishor Yadav, Manisha Pattanaik, G. K. Sharma
Operation-aware assist circuit design for improved write performance of FinFET based SRAM. VDAT (2014)
Nandakishor Yadav, Shikha Jain, Manisha Pattanaik, G. K. Sharma
NBTI aware IG-FinFET based SRAM design using adaptable trip-point sensing technique. NANOARCH (2014)
Nandakishor Yadav, Sunil Dutt, G. K. Sharma
A New Sensitivity-Driven Process Variation Aware Self-Repairing Low-Power SRAM Design. VLSI Design (2014)
Nandakishor Yadav, Sunil Dutt, Manisha Pattanaik, G. K. Sharma
Double-gate FinFET process variation aware 10T SRAM cell topology design and analysis. ECCTD (2013)
Rahul Krishnamurthy, G. K. Sharma
An Area Efficient Wide Range On-Chip Delay Measurement Architecture. VDAT (2013)
Saurabh Agrawal, Dhawal Sant, G. K. Sharma
An efficient energy- and bandwidth- aware mapping algorithm for regular NoC architecture. NoCArc@MICRO (2010)
Prateek Vajpayee, Anurag Srivastava, Sher S. Rajput, G. K. Sharma
Low voltage regulated cascode current mirrors suitable for sub-1V operation. APCCAS (2010)
V. P. Singh, Snehashish Chakraverty, R. K. Sharma, G. K. Sharma
Modeling vibration frequencies of annular plates by regression based neural network. Appl. Soft Comput. 9 (1) (2009)
Nirved Pandey, G. K. Sharma
Startup comparison for message passing libraries with DTM on linux clusters. J. Supercomput. 39 (1) (2007)
Hiren Joshi, S. S. Verma, G. K. Sharma
Quality Driven Dynamic Low Power Reconfiguration of Handhelds. ARC (2006)
Hiren Joshi, S. S. Verma, G. K. Sharma
Requested-QoS Driven Runtime Reconfiguration of Mobile Devices. FPL (2005)
Nirved Pandey, G. K. Sharma
Equivalent Query Transformer for Semantic Query Optimization in Distributed Computing Environment. Applied Informatics (2003)
Seema Bawa, G. K. Sharma
A Parallel Transitive Closure Computation Algorithm for VLSI Test Generation. PARA (2002)
Peter Poechmueller, G. K. Sharma, Manfred Glesner
A CAD tool for designing large, fault-tolerant VLSI arrays. Great Lakes Symposium on VLSI (1991)