Nandakishor Yadav

Publication Activity (10 Years)

Years Active: 2013-2023
Publications (10 Years): 7

Top Topics

Recent Approaches

Convolutional Neural Networks

Discriminative Classifiers

Top Venues

Microelectron. Reliab.

IET Comput. Digit. Tech.

Publications

Medeswara Rao Kondamudi, Somya Ranjan Sahoo, Lokesh Chouhan, Nandakishor Yadav
A comprehensive survey of fake news in social networks: Attributes, features, and detection approaches. J. King Saud Univ. Comput. Inf. Sci. 35 (6) (2023)
Shuai Li, Yukui Luo, Kuangyuan Sun, Nandakishor Yadav, Kyuwon Ken Choi
A Novel FPGA Accelerator Design for Real-Time and Ultra-Low Power Deep Convolutional Neural Networks Compared With Titan X GPU. IEEE Access 8 (2020)
Ambika Prasad Shah, Nandakishor Yadav, Ankur Beohar, Santosh Kumar Vishvakarma
SUBHDIP: process variations tolerant subthreshold Darlington pair-based NBTI sensor circuit. IET Comput. Digit. Tech. 13 (3) (2019)
Ambika Prasad Shah, Nandakishor Yadav, Ankur Beohar, Santosh Kumar Vishvakarma
An efficient NBTI sensor and compensation circuit for stable and reliable SRAM cells. Microelectron. Reliab. 87 (2018)
Ambika Prasad Shah, Nandakishor Yadav, Santosh Kumar Vishvakarma
LISOCHIN: An NBTI Degradation Monitoring Sensor for Reliable CMOS Circuits. VDAT (2017)
Nandakishor Yadav, Ankur Beohar, Santosh Kumar Vishvakarma
Analysis of Single-Trap-Induced Random Telegraph Noise on Asymmetric High-k Spacer FinFET. iNIS (2016)
Shraddha Thakre, Ankur Beohar, Vikas Vijayvargiya, Nandakishor Yadav, Santosh Kumar Vishvakarma
Investigation of DC Characteristic on DG-Tunnel FET with High-K Dielectric Using Distinct Device Parameter. iNIS (2016)
Nandakishor Yadav, Shikha Jain, Manisha Pattanaik, G. K. Sharma
A novel stability and process sensitivity driven model for optimal sized FinFET based SRAM. Microelectron. Reliab. 55 (8) (2015)
Nandakishor Yadav, Manisha Pattanaik, G. K. Sharma
New Topology Approach for Future Process, Voltage and Temperature Aware SRAM Using Independently Controlled Double-Gate FinFET. J. Low Power Electron. 11 (1) (2015)
Ekta Prajapati, Nandakishor Yadav, Manisha Pattanaik, G. K. Sharma
Operation-aware assist circuit design for improved write performance of FinFET based SRAM. VDAT (2014)
Nandakishor Yadav, Shikha Jain, Manisha Pattanaik, G. K. Sharma
NBTI aware IG-FinFET based SRAM design using adaptable trip-point sensing technique. NANOARCH (2014)
Nandakishor Yadav, Sunil Dutt, G. K. Sharma
A New Sensitivity-Driven Process Variation Aware Self-Repairing Low-Power SRAM Design. VLSI Design (2014)
Nandakishor Yadav, Sunil Dutt, Manisha Pattanaik, G. K. Sharma
Double-gate FinFET process variation aware 10T SRAM cell topology design and analysis. ECCTD (2013)